diff mbox series

[RFC,12/15] drm/i915/display/mtl: Reset FRL Transcoder config while disabling HDMI

Message ID 20221107072045.628895-13-ankit.k.nautiyal@intel.com (mailing list archive)
State New, archived
Headers show
Series Add support for HDMI2.1 FRL | expand

Commit Message

Ankit Nautiyal Nov. 7, 2022, 7:20 a.m. UTC 
While disabling HDMI, reset the FRL transcoder config if FRL mode was
used.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5e2e4c78c564..cb0d19b6ee56 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2667,6 +2667,8 @@  static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
+	enum transcoder hdmi_transcoder;
+	u8 buf;
 
 	dig_port->set_infoframes(encoder, false,
 				 old_crtc_state, old_conn_state);
@@ -2679,6 +2681,16 @@  static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
 	if (DISPLAY_VER(dev_priv) >= 12)
 		intel_ddi_disable_pipe_clock(old_crtc_state);
 
+	if (old_crtc_state->frl.enable) {
+		hdmi_transcoder = old_crtc_state->cpu_transcoder;
+		buf = intel_de_read(dev_priv,
+				    TRANS_HDMI_FRL_CFG(hdmi_transcoder));
+		buf &= ~(TRANS_HDMI_FRL_ENABLE | TRANS_HDMI_FRL_TRAINING_COMPLETE);
+
+		intel_de_write(dev_priv,
+			       TRANS_HDMI_FRL_CFG(hdmi_transcoder), buf);
+	}
+
 	intel_display_power_put(dev_priv,
 				dig_port->ddi_io_power_domain,
 				fetch_and_zero(&dig_port->ddi_io_wakeref));