@@ -463,6 +463,7 @@ samsung_dsim_types[SAMSUNG_DSIM_TYPE_COUNT] = {
[SAMSUNG_DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data,
[SAMSUNG_DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data,
[SAMSUNG_DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data,
+ [SAMSUNG_DSIM_TYPE_IMX8MP] = &imx8mm_dsi_driver_data,
};
static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h)
@@ -1425,10 +1426,17 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge,
* 13.6.2.7.2 RGB interface
* both claim "Vsync, Hsync, and VDEN are active high signals.", the
* LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW.
+ *
+ * The i.MX8M Plus glue logic between LCDIFv3 and DSIM does not
+ * implement the same behavior, therefore LCDIFv3 must generate
+ * HS/VS/DE signals active HIGH.
*/
if (dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MM) {
adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC);
adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
+ } else if (dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MP) {
+ adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC);
+ adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
}
return 0;
@@ -1461,7 +1469,8 @@ static int samsung_dsim_attach(struct drm_bridge *bridge,
* Passing NULL to the previous bridge makes Exynos DSI drivers
* work which is exactly done before.
*/
- if (!(dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MM))
+ if (dsi->plat_data->hw_type != SAMSUNG_DSIM_TYPE_IMX8MM &&
+ dsi->plat_data->hw_type != SAMSUNG_DSIM_TYPE_IMX8MP)
previous = NULL;
return drm_bridge_attach(bridge->encoder, dsi->out_bridge, previous,
@@ -1662,6 +1671,10 @@ static const struct samsung_dsim_host_ops samsung_dsim_generic_host_ops = {
.unregister_host = samsung_dsim_unregister_host,
};
+static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_high = {
+ .input_bus_flags = DRM_BUS_FLAG_DE_HIGH,
+};
+
static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_low = {
.input_bus_flags = DRM_BUS_FLAG_DE_LOW,
};
@@ -1751,6 +1764,8 @@ int samsung_dsim_probe(struct platform_device *pdev)
/* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */
if (dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MM)
dsi->bridge.timings = &samsung_dsim_bridge_timings_de_low;
+ else
+ dsi->bridge.timings = &samsung_dsim_bridge_timings_de_high;
if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host)
ret = dsi->plat_data->host_ops->register_host(dsi);
@@ -1857,11 +1872,20 @@ static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = {
.host_ops = &samsung_dsim_generic_host_ops,
};
+static const struct samsung_dsim_plat_data samsung_dsim_imx8mp_pdata = {
+ .hw_type = SAMSUNG_DSIM_TYPE_IMX8MP,
+ .host_ops = &samsung_dsim_generic_host_ops,
+};
+
static const struct of_device_id samsung_dsim_of_match[] = {
{
.compatible = "fsl,imx8mm-mipi-dsim",
.data = &samsung_dsim_imx8mm_pdata,
},
+ {
+ .compatible = "fsl,imx8mp-mipi-dsim",
+ .data = &samsung_dsim_imx8mp_pdata,
+ },
{ /* sentinel. */ }
};
MODULE_DEVICE_TABLE(of, samsung_dsim_of_match);
@@ -28,6 +28,7 @@ enum samsung_dsim_type {
SAMSUNG_DSIM_TYPE_EXYNOS5422,
SAMSUNG_DSIM_TYPE_EXYNOS5433,
SAMSUNG_DSIM_TYPE_IMX8MM,
+ SAMSUNG_DSIM_TYPE_IMX8MP,
SAMSUNG_DSIM_TYPE_COUNT,
};