From patchwork Sat Nov 19 17:30:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13049762 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5DD0FC433FE for ; Sat, 19 Nov 2022 17:30:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 02A8810E24B; Sat, 19 Nov 2022 17:30:36 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by gabe.freedesktop.org (Postfix) with ESMTPS id 00D5810E223 for ; Sat, 19 Nov 2022 17:30:32 +0000 (UTC) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AJHUN3C044519; Sat, 19 Nov 2022 11:30:23 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1668879023; bh=r8sLHDDOzGgbBCIGqYcV91GxOugG6GFPoo0nw7unMfE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=dD0JnMrLEqNU/jITbbU7UNta+mN+t7nmx5klAzpvhduqMtl+jLOO+X0BpRE60HCFh HtjNVCkjqrs2/1gmsg0acJkQSLu/l+lhMxcHBjJe2xq/ltyciIcZL4Ycmwv2DkVrHg iHneJGa4p8Q5RCI5a+lc5VoZDuyOc4Pa1TJf8KO4= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AJHUNft093884 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 19 Nov 2022 11:30:23 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Sat, 19 Nov 2022 11:30:22 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Sat, 19 Nov 2022 11:30:22 -0600 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AJHUMnK055641; Sat, 19 Nov 2022 11:30:22 -0600 From: Aradhya Bhatia To: Tomi Valkeinen , Jyri Sarha , Rob Herring , David Airlie , Daniel Vetter , Krzysztof Kozlowski Subject: [PATCH v6 1/5] dt-bindings: display: ti, am65x-dss: Add support for am625 dss Date: Sat, 19 Nov 2022 23:00:15 +0530 Message-ID: <20221119173019.15643-2-a-bhatia1@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221119173019.15643-1-a-bhatia1@ti.com> References: <20221119173019.15643-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Devicetree List , Jayesh Choudhary , Rahul T R , Devarsh Thakkar , Linux Kernel List , DRI Development List , Aradhya Bhatia , Vignesh Raghavendra Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The DSS controller on TI's AM625 SoC is an update from that on TI's AM65X SoC. The former has an additional OLDI TX on its first video port (VP0) that helps output cloned video or WUXGA (1920x1200@60fps) resolution video output over a dual-link mode to reduce the required OLDI clock output. Add the new controller's compatible and a port property for the 2nd OLDI TX (OLDI TX 1). Signed-off-by: Aradhya Bhatia Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rahul T R --- .../bindings/display/ti/ti,am65x-dss.yaml | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 5c7d2cbc4aac..55ec91f11577 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -19,7 +19,9 @@ description: | properties: compatible: - const: ti,am65x-dss + enum: + - ti,am625-dss + - ti,am65x-dss reg: description: @@ -80,13 +82,18 @@ properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: - The DSS OLDI output port node form video port 1 + The DSS OLDI output port node form video port 1 (OLDI TX 0). port@1: $ref: /schemas/graph.yaml#/properties/port description: The DSS DPI output port node from video port 2 + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: + The DSS OLDI output port node form video port 1 (OLDI TX 1). + ti,am65x-oldi-io-ctrl: $ref: "/schemas/types.yaml#/definitions/phandle" description: @@ -102,6 +109,18 @@ properties: Input memory (from main memory to dispc) bandwidth limit in bytes per second +allOf: + - if: + properties: + compatible: + contains: + const: ti,am65x-dss + then: + properties: + ports: + properties: + port@2: false + required: - compatible - reg