From patchwork Tue Dec 6 01:19:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniele Ceraolo Spurio X-Patchwork-Id: 13065284 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25495C4708C for ; Tue, 6 Dec 2022 01:16:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8FCC110E2E9; Tue, 6 Dec 2022 01:15:40 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9AF6110E2EB; Tue, 6 Dec 2022 01:15:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670289331; x=1701825331; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kD3MapRAnUEeCcihf1HuFNJAvWgIpzYDpQ7Tw/E1hiM=; b=brjOIepSQ3NPCIDxePh36jaX4WUVcBVkgjDGbIGfwQ2Y+SY4nR0bBDSa +KUYzo7ppGwyb7DYTXUvMxcWmbrstTbtkY0Y3EuhZ9dbNM+7ttEV4nAAh ui1ZJJBWOkByVV4d9HiJzJSKIxL78qSMoFrTwijrjmD+0YKg2CUmZNFZa vzgLAO7DuY6sywdhnDK59jJkbhuFGEU6ozhTVivjreFXkk0GfqN7Pt3As BYGeLJ+tpenAoBjeZAOROIK1a+3Rhhg2er6Vv7WwntNbMits6QmK1MnzB foXh/PMeKQNNtucAcdBVPh3ftH6GYV4Ci35NyU3shIAPnLIc3SsuCIWVo A==; X-IronPort-AV: E=McAfee;i="6500,9779,10552"; a="317650483" X-IronPort-AV: E=Sophos;i="5.96,220,1665471600"; d="scan'208";a="317650483" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2022 17:15:31 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10552"; a="974890727" X-IronPort-AV: E=Sophos;i="5.96,220,1665471600"; d="scan'208";a="974890727" Received: from valcore-skull-1.fm.intel.com ([10.1.27.19]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2022 17:15:30 -0800 From: Daniele Ceraolo Spurio To: intel-gfx@lists.freedesktop.org Subject: [PATCH v2 6/6] drm/i915/mtl: MTL has one GSC CS on the media GT Date: Mon, 5 Dec 2022 17:19:08 -0800 Message-Id: <20221206011908.2745508-7-daniele.ceraolospurio@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221206011908.2745508-1-daniele.ceraolospurio@intel.com> References: <20221206011908.2745508-1-daniele.ceraolospurio@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniele Ceraolo Spurio , dri-devel@lists.freedesktop.org, Rodrigo Vivi Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Now that we have the GSC FW support code as a user to the GSC CS, we can add the relevant flag to the engine mask. Note that the engine will still be disabled until we define the GSC FW binary file. Signed-off-by: Daniele Ceraolo Spurio Cc: Matt Roper Cc: Rodrigo Vivi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 414b4bfd514b..3f803c1280c0 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -1125,7 +1125,7 @@ static const struct intel_gt_definition xelpmp_extra_gt[] = { .type = GT_MEDIA, .name = "Standalone Media GT", .gsi_offset = MTL_MEDIA_GSI_BASE, - .engine_mask = BIT(VECS0) | BIT(VCS0) | BIT(VCS2), + .engine_mask = BIT(VECS0) | BIT(VCS0) | BIT(VCS2) | BIT(GSC0), }, {} };