From patchwork Wed Dec 14 12:58:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13073080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35B1FC4332F for ; Wed, 14 Dec 2022 13:01:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 50B7710E3ED; Wed, 14 Dec 2022 13:01:05 +0000 (UTC) Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by gabe.freedesktop.org (Postfix) with ESMTPS id 57C2810E3E8 for ; Wed, 14 Dec 2022 13:00:44 +0000 (UTC) Received: by mail-pj1-x1034.google.com with SMTP id e7-20020a17090a77c700b00216928a3917so7050835pjs.4 for ; Wed, 14 Dec 2022 05:00:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aE+Kf4GZG5cBJgW4Glr+nCZ/Jxj375yDCGwPDOZtAag=; b=QYfGH67RCNP4ggltQXFylrBgZVcAg9cRrbZdN1vWHTdLaGFcPMLRvVSRKMRVxOE35t XRXDZK4tFshArITirZrpNslKMeBf09ZzOVPlT38d32Ij9Z9uW4vD/ACxkr9zUqMIn2oZ +aNzZN0m46RtLWUI5b8zf/kLB5E+3kRLLYr4A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aE+Kf4GZG5cBJgW4Glr+nCZ/Jxj375yDCGwPDOZtAag=; b=Pl2i9Sv4QNahOHnwLSpIIDtXu4DUWyI4mWuukKLZKNav3SlPZwaN8Ujz61Trvnnfuh dSuhOiPJNP+X+kIr88zojTQImeYAQPyFVC/BmynQfocuX0fIHS61vaSHbRFge5SR6XSV 9/QljjIlMX2BTcyqj7WeQcx43CtqTN+jxrRdXm7FbTXQ5XSB0RPjxkBcuokHtzqglE63 xkJlTJBO484G3FVDN52yZ44wd6xjqfmBD4tcmlxvWEdjwqe2in3xn9a6H9OjaVCb9azA 9mCqyTDNT99hFGgt7lUA+HMXL8j5lbTQHFFd5kEslu6QMH81KVMEqTnRh2scWqr2gM0p QxRQ== X-Gm-Message-State: ANoB5pmncLDkUI67DBBHi/KlatX4KK+5iYNfgs8pr1pJ/NdgZV0u+Yy+ QfIUtP4gkY+v89vOk3JZaHHelA== X-Google-Smtp-Source: AA0mqf7JNLSv0OByMIEhJW/YCj/gWjdNa7I85fBn049iQTXla5BLMm2+FnSQqWbyAvRAcdmsBL0Dzw== X-Received: by 2002:a17:902:7d93:b0:189:666a:8d78 with SMTP id a19-20020a1709027d9300b00189666a8d78mr23375559plm.4.1671022843876; Wed, 14 Dec 2022 05:00:43 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:5e03:faf:846e:352d]) by smtp.gmail.com with ESMTPSA id ix17-20020a170902f81100b001895f7c8a71sm1838651plb.97.2022.12.14.05.00.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 05:00:43 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v10 10/18] drm: exynos: dsi: Add input_bus_flags Date: Wed, 14 Dec 2022 18:28:59 +0530 Message-Id: <20221214125907.376148-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221214125907.376148-1-jagan@amarulasolutions.com> References: <20221214125907.376148-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Suggested-by: Marek Vasut Signed-off-by: Jagan Teki Reviewed-by: Frieder Schrempf --- Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 12a40576f937..36820a7b5884 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1692,6 +1692,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1778,6 +1782,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime;