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Wed, 4 Jan 2023 16:44:27 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF00010207.mail.protection.outlook.com (10.167.241.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5944.8 via Frontend Transport; Wed, 4 Jan 2023 16:44:27 +0000 Received: from AUS-LX-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 4 Jan 2023 10:43:45 -0600 From: Mario Limonciello To: Alex Deucher , Subject: [PATCH v5 28/45] drm/amd: Optimize SRIOV switch/case for PSP microcode load Date: Wed, 4 Jan 2023 10:40:17 -0600 Message-ID: <20230104164042.30271-29-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230104164042.30271-1-mario.limonciello@amd.com> References: <20230104164042.30271-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00010207:EE_|IA1PR12MB7637:EE_ X-MS-Office365-Filtering-Correlation-Id: e079dd52-a4a9-45eb-dd01-08daee72f1c6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jan 2023 16:44:27.5745 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e079dd52-a4a9-45eb-dd01-08daee72f1c6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00010207.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7637 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Pan, Xinhui" , Lazar Lijo , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, Carlos Soriano Sanchez , christian.koenig@amd.com, Mario Limonciello Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Now that IP version decoding is used, a number of case statements can be combined. Reviewed-by: Christian König Signed-off-by: Mario Limonciello --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 8a3a38ea7b46..15ffc5a6e4da 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -132,14 +132,8 @@ static int psp_init_sriov_microcode(struct psp_context *psp) switch (adev->ip_versions[MP0_HWIP][0]) { case IP_VERSION(9, 0, 0): - adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; - ret = psp_init_cap_microcode(psp, ucode_prefix); - break; - case IP_VERSION(11, 0, 9): - adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; - ret = psp_init_cap_microcode(psp, ucode_prefix); - break; case IP_VERSION(11, 0, 7): + case IP_VERSION(11, 0, 9): adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; ret = psp_init_cap_microcode(psp, ucode_prefix); break;