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Thu, 19 Jan 2023 15:52:11 -0800 Received: from hwentlanryzen.amd.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 19 Jan 2023 17:52:10 -0600 From: Harry Wentland To: , Subject: [PATCH 1/7] drm/amdgpu/display/mst: Fix mst_state->pbn_div and slot count assignments Date: Thu, 19 Jan 2023 18:51:54 -0500 Message-ID: <20230119235200.441386-2-harry.wentland@amd.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230119235200.441386-1-harry.wentland@amd.com> References: <20230119235200.441386-1-harry.wentland@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT015:EE_|BL1PR12MB5190:EE_ X-MS-Office365-Filtering-Correlation-Id: e87508d6-db49-47c0-b9d2-08dafa782f38 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: yTHcCiv06tO86GXDzUGZPqQSjJ8XfwzXUZQ6ZsgU/wpmgwKLsk7DR1PC0UONZ9N8VuvT5MBEZB89grvCCXsstj3801dRWFj6hM2KX+7E1cXG3iz63ti/fTkl3BqkyCS2iQV6AjAIDqBtKzUhnvtHQqJ2nhUQESiFnaSelrHPwPzaknJ3wMjp7vtwKYputK/6GjV5tKntuVS4M02Dvbl2W5GXnxYTCOwxZHacq1OHtruBvsEVSmC6yifKpzJEqoB6zcvCndFerWvDcaVqCqfCVlCKN+V3iW21jsEUSJMvas/x0ezAQMh1AGNZKOPVIWR9zKDk89a1sFnl1wnWShiQtEm6cknqy9Wq8215ReeUArkBWlnSznhtASmAXS516wx08s16V87h3OFleFXqiaFrX2f1Lu4k2OnVB0EXGO40SfZjhHPEzFZb1XI6ZT69VAfd45TKqM2fNNN78ueEbVL6iJzcIvs92l23GSURizWQaNDkmAih+cmAOo+1PdvyxpXU04mb0ponsVSnhqPKSN0urUQYYCjMy5Ap/x4sZa8SFShNGwb6LjzQivfzRgYkHK2+h3WQl8g2lD9gL9Tdw99Z2RjD3X9kBvdaNiD34nLxnhgNGpH52RnflKhQaGVsrgDV7PT3Fn+znYpUiz5cWF6j83rAPTv1JqLVZfqbes6FvNJWemwwk2HL808GBxZabhAI X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(376002)(39860400002)(396003)(346002)(136003)(451199015)(40470700004)(36840700001)(46966006)(316002)(81166007)(82740400003)(5660300002)(54906003)(44832011)(4326008)(2616005)(1076003)(8936002)(426003)(41300700001)(36756003)(26005)(186003)(83380400001)(47076005)(70206006)(70586007)(8676002)(40460700003)(110136005)(6666004)(40480700001)(356005)(82310400005)(336012)(86362001)(2906002)(36860700001)(966005)(7696005)(478600001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2023 23:52:12.0987 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e87508d6-db49-47c0-b9d2-08dafa782f38 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5190 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stable@vger.kernel.org, stanislav.lisovskiy@intel.com, jerry.zuo@amd.com, bskeggs@redhat.com, Wayne.Lin@amd.com, mario.limonciello@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Lyude Paul Looks like I made a pretty big mistake here without noticing: it seems when I moved the assignments of mst_state->pbn_div I completely missed the fact that the reason for us calling drm_dp_mst_update_slots() earlier was to account for the fact that we need to call this function using info from the root MST connector, instead of just trying to do this from each MST encoder's atomic check function. Otherwise, we end up filling out all of DC's link information with zeroes. So, let's restore that and hopefully fix this DSC regression. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2171 Signed-off-by: Lyude Paul Signed-off-by: Harry Wentland Fixes: 4d07b0bc4034 ("drm/display/dp_mst: Move all payload info into the atomic state") Cc: stable@vger.kernel.org # 6.1 Acked-by: Harry Wentland --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++++++++++++++++++ .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 ---- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 22aadbad58d3..4c5b8793b8af 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -9643,6 +9643,8 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, struct drm_connector_state *old_con_state, *new_con_state; struct drm_crtc *crtc; struct drm_crtc_state *old_crtc_state, *new_crtc_state; + struct drm_dp_mst_topology_mgr *mgr; + struct drm_dp_mst_topology_state *mst_state; struct drm_plane *plane; struct drm_plane_state *old_plane_state, *new_plane_state; enum dc_status status; @@ -9898,6 +9900,28 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, lock_and_validation_needed = true; } +#if defined(CONFIG_DRM_AMD_DC_DCN) + /* set the slot info for each mst_state based on the link encoding format */ + for_each_new_mst_mgr_in_state(state, mgr, mst_state, i) { + struct amdgpu_dm_connector *aconnector; + struct drm_connector *connector; + struct drm_connector_list_iter iter; + u8 link_coding_cap; + + drm_connector_list_iter_begin(dev, &iter); + drm_for_each_connector_iter(connector, &iter) { + if (connector->index == mst_state->mgr->conn_base_id) { + aconnector = to_amdgpu_dm_connector(connector); + link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(aconnector->dc_link); + drm_dp_mst_update_slots(mst_state, link_coding_cap); + + break; + } + } + drm_connector_list_iter_end(&iter); + } +#endif + /** * Streams and planes are reset when there are changes that affect * bandwidth. Anything that affects bandwidth needs to go through diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 5fa9bab95038..e8d14ab0953a 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -927,11 +927,6 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, if (IS_ERR(mst_state)) return PTR_ERR(mst_state); - mst_state->pbn_div = dm_mst_get_pbn_divider(dc_link); -#if defined(CONFIG_DRM_AMD_DC_DCN) - drm_dp_mst_update_slots(mst_state, dc_link_dp_mst_decide_link_encoding_format(dc_link)); -#endif - /* Set up params */ for (i = 0; i < dc_state->stream_count; i++) { struct dc_dsc_policy dsc_policy = {0};