From patchwork Fri Jan 20 04:38:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13109133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECE9CC678DD for ; Fri, 20 Jan 2023 04:42:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E06B710EA37; Fri, 20 Jan 2023 04:42:37 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1A1F110EA2C; Fri, 20 Jan 2023 04:42:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674189743; x=1705725743; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RHAeePu5k06+cXUGUdFkNqY3TdDuHlQbUqavKQCLT+o=; b=fi89wdslReDYjIn/vQ0rKONLMwJlUgH8RKyO1rm3bwJvwf8xYUlBCNvv XSz7ZTnKZ482p+nDc8HXHhH4S+uDL9WxwIxUAyMLNjyX9YsnMg0cNj3Sd OXy0bZzHXmPSEIjfNQdvxhm0Ded/Z0/suFM7RxzKp+yE6/4Ws+uC8DJP7 7TfKrSTU4TjgPUJduh7d3kxBafWE2FXFxYEjeMJpooIF60+ErR9JaGWXD y8hja42s8ugYg5CC3EkXQhnmFQusRpBCraRnfaVCzAnT2fD8WTI1FyYeZ cULzqBz+4lFZdpyetbPjlVJx+MZMGtxMyRpbhvvulLXTml052gwddaOCl Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10595"; a="323195576" X-IronPort-AV: E=Sophos;i="5.97,231,1669104000"; d="scan'208";a="323195576" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jan 2023 20:42:22 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10595"; a="692735024" X-IronPort-AV: E=Sophos;i="5.97,231,1669104000"; d="scan'208";a="692735024" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jan 2023 20:42:20 -0800 From: Ankit Nautiyal To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 11/16] drm/display/dp: Fix the DP DSC Receiver cap size Date: Fri, 20 Jan 2023 10:08:39 +0530 Message-Id: <20230120043844.3761895-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230120043844.3761895-1-ankit.k.nautiyal@intel.com> References: <20230120043844.3761895-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: manasi.d.navare@intel.com, vandita.kulkarni@intel.com, anusha.srivatsa@intel.com, swati2.sharma@intel.com, stanislav.lisovskiy@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh. Fix the DSC RECEIVER CAP SIZE accordingly. Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT") Cc: Anusha Srivatsa Cc: Manasi Navare Cc: # v5.0+ Reported-by: kernel test robot Signed-off-by: Ankit Nautiyal --- include/drm/display/drm_dp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 632376c291db..bdc05593f462 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1532,7 +1532,7 @@ enum drm_dp_phy { #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf -#define DP_DSC_RECEIVER_CAP_SIZE 0xf +#define DP_DSC_RECEIVER_CAP_SIZE 0x10 /* DSC Capabilities 0x60 through 0x6F */ #define EDP_PSR_RECEIVER_CAP_SIZE 2 #define EDP_DISPLAY_CTL_CAP_SIZE 3 #define DP_LTTPR_COMMON_CAP_SIZE 8