From patchwork Mon Jan 23 10:47:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13112489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C22B2C54E94 for ; Mon, 23 Jan 2023 16:04:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 70C9610E4EB; Mon, 23 Jan 2023 16:04:36 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8FECF10E1E4 for ; Mon, 23 Jan 2023 10:48:03 +0000 (UTC) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id CE5BB74C; Mon, 23 Jan 2023 11:48:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1674470882; bh=VnikqIodgOPEkTdXPN9SF06GfzPMqm5umq6cONjY9mw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vmub57ZNSQnsRqWbWTV8UjcMchE1TT5/QmBf4Cm5NVPrNRIMvIH5qNVnaSrlRjy4J 1bF1WxjNdXD18hzX4uSs/87v/VjNeU7ibpTmtoDvtpjUxk39YLpg9W1P3s4i3GBazA b1HyJNzAXEIZC7TPqPkt/XAnp2mXhxm40FohEuIY= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v3 4/7] drm: rcar-du: lvds: Fix stop sequence Date: Mon, 23 Jan 2023 12:47:39 +0200 Message-Id: <20230123104742.227460-5-tomi.valkeinen+renesas@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123104742.227460-1-tomi.valkeinen+renesas@ideasonboard.com> References: <20230123104742.227460-1-tomi.valkeinen+renesas@ideasonboard.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 23 Jan 2023 16:04:33 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , Geert Uytterhoeven , Koji Matsuoka , LUU HOAI Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Koji Matsuoka According to hardware manual, LVDCR0 register must be cleared bit by bit when disabling LVDS. Signed-off-by: Koji Matsuoka Signed-off-by: LUU HOAI [tomi.valkeinen: simplified the code a bit] Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/rcar-du/rcar_lvds.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c index a11201e4d31b..8cd86a3d65a5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c @@ -83,6 +83,11 @@ struct rcar_lvds { #define bridge_to_rcar_lvds(b) \ container_of(b, struct rcar_lvds, bridge) +static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) +{ + return ioread32(lvds->mmio + reg); +} + static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) { iowrite32(data, lvds->mmio + reg); @@ -544,6 +549,27 @@ static void rcar_lvds_atomic_disable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); + u32 lvdcr0; + + lvdcr0 = rcar_lvds_read(lvds, LVDCR0); + + lvdcr0 &= ~LVDCR0_LVRES; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + + if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) { + lvdcr0 &= ~LVDCR0_LVEN; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + if (lvds->info->quirks & RCAR_LVDS_QUIRK_PWD) { + lvdcr0 &= ~LVDCR0_PWD; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) { + lvdcr0 &= ~LVDCR0_PLLON; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } rcar_lvds_write(lvds, LVDCR0, 0); rcar_lvds_write(lvds, LVDCR1, 0);