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Tue, 24 Jan 2023 05:47:23 +0000 From: Michael Riesch To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v3 5/6] drm/rockchip: vop2: add support for the rgb output block Date: Tue, 24 Jan 2023 06:47:05 +0100 Message-Id: <20230124054706.3921383-6-michael.riesch@wolfvision.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230124054706.3921383-1-michael.riesch@wolfvision.net> References: <20230124054706.3921383-1-michael.riesch@wolfvision.net> X-ClientProxiedBy: ZR0P278CA0189.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:44::6) To DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR08MB9155:EE_|VI1PR08MB10032:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a016dd7-b29f-4535-b0c3-08dafdce7771 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Add support for this output block. Signed-off-by: Michael Riesch --- v3: - fix commit messages (still assumed video port 2) - fix condition to make 0 a valid video port v2: - move away from wrong assumption that the RGB block is always connected to video port 2 -> check devicetree to find RGB block drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 06fcdfa7b885..f38ffd0ccd9f 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -39,6 +39,7 @@ #include "rockchip_drm_gem.h" #include "rockchip_drm_fb.h" #include "rockchip_drm_vop2.h" +#include "rockchip_rgb.h" /* * VOP2 architecture @@ -212,6 +213,9 @@ struct vop2 { struct clk *hclk; struct clk *aclk; + /* optional internal rgb encoder */ + struct rockchip_rgb *rgb; + /* must be put at the end of the struct */ struct vop2_win win[]; }; @@ -2393,6 +2397,25 @@ static void vop2_destroy_crtcs(struct vop2 *vop2) } } +static int vop2_find_rgb_encoder(struct vop2 *vop2) +{ + struct device_node *node = vop2->dev->of_node; + struct device_node *endpoint; + int i; + + for (i = 0; i < vop2->data->nr_vps; i++) { + endpoint = of_graph_get_endpoint_by_regs(node, i, + ROCKCHIP_VOP2_EP_RGB0); + if (!endpoint) + continue; + + of_node_put(endpoint); + return i; + } + + return -ENOENT; +} + static struct reg_field vop2_cluster_regs[VOP2_WIN_MAX_REG] = { [VOP2_WIN_ENABLE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 0, 0), [VOP2_WIN_FORMAT] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 1, 5), @@ -2698,11 +2721,29 @@ static int vop2_bind(struct device *dev, struct device *master, void *data) if (ret) return ret; + ret = vop2_find_rgb_encoder(vop2); + if (ret >= 0) { + vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc, + vop2->drm, ret); + if (IS_ERR(vop2->rgb)) { + if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) { + ret = PTR_ERR(vop2->rgb); + goto err_crtcs; + } + vop2->rgb = NULL; + } + } + rockchip_drm_dma_init_device(vop2->drm, vop2->dev); pm_runtime_enable(&pdev->dev); return 0; + +err_crtcs: + vop2_destroy_crtcs(vop2); + + return ret; } static void vop2_unbind(struct device *dev, struct device *master, void *data) @@ -2711,6 +2752,9 @@ static void vop2_unbind(struct device *dev, struct device *master, void *data) pm_runtime_disable(dev); + if (vop2->rgb) + rockchip_rgb_fini(vop2->rgb); + vop2_destroy_crtcs(vop2); }