| Message ID | 20230125195401.4183544-14-jonathan.kim@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Upstream of kernel support for AMDGPU ISA debugging | expand |
On 2023-01-25 14:53, Jonathan Kim wrote: > Unlike single process debug devices, multi-process debug devices allow > debug mode setting per-VMID (non-device-global). > > Because the HWS manages PASID-VMID mapping, the new MAP_PROCESS API allows > the KFD to forward the required SPI debug register write requests. > > To request a new debug mode setting change, the KFD must be able to > preempt all queues then remap all queues with these new setting > requests for MAP_PROCESS to take effect. > > Note that by default, trap enablement in non-debug mode must be disabled > for performance reasons for multi-process debug devices due to setup > overhead in FW. > > v2: remove asic family code name comment in per vmid support check > > Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> > --- > drivers/gpu/drm/amd/amdkfd/kfd_debug.h | 7 +++ > .../drm/amd/amdkfd/kfd_device_queue_manager.c | 50 +++++++++++++++++++ > .../drm/amd/amdkfd/kfd_device_queue_manager.h | 3 ++ > .../drm/amd/amdkfd/kfd_packet_manager_v9.c | 15 ++++++ > drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 9 ++++ > drivers/gpu/drm/amd/amdkfd/kfd_process.c | 5 ++ > 6 files changed, 89 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h > index 8aa7a3ad4e97..53c5a3e55bd2 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h > @@ -32,5 +32,12 @@ int kfd_dbg_trap_disable(struct kfd_process *target); > int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd, > void __user *runtime_info, > uint32_t *runtime_info_size); > + > +static inline bool kfd_dbg_is_per_vmid_supported(struct kfd_dev *dev) > +{ > + return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2); > +} > + > void debug_event_write_work_handler(struct work_struct *work); > + > #endif > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c > index 0cd3a5e9ff25..2517716d7cbc 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c > @@ -2554,6 +2554,56 @@ int release_debug_trap_vmid(struct device_queue_manager *dqm, > return r; > } > > +int debug_lock_and_unmap(struct device_queue_manager *dqm) > +{ > + int r; > + > + if (dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { > + pr_err("Unsupported on sched_policy: %i\n", dqm->sched_policy); > + return -EINVAL; > + } > + > + if (!kfd_dbg_is_per_vmid_supported(dqm->dev)) > + return 0; > + > + dqm_lock(dqm); > + > + r = unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0, 0, false); > + if (r) > + dqm_unlock(dqm); > + > + return r; > +} > + > +int debug_map_and_unlock(struct device_queue_manager *dqm) > +{ > + int r; > + > + if (dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { > + pr_err("Unsupported on sched_policy: %i\n", dqm->sched_policy); > + return -EINVAL; > + } > + > + if (!kfd_dbg_is_per_vmid_supported(dqm->dev)) > + return 0; > + > + r = map_queues_cpsch(dqm); > + > + dqm_unlock(dqm); > + > + return r; > +} > + > +int debug_refresh_runlist(struct device_queue_manager *dqm) > +{ > + int r = debug_lock_and_unmap(dqm); > + > + if (r) > + return r; > + > + return debug_map_and_unlock(dqm); > +} > + > #if defined(CONFIG_DEBUG_FS) > > static void seq_reg_dump(struct seq_file *m, > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h > index 0cb1504d24cf..bef3be84c5cc 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h > @@ -286,6 +286,9 @@ int reserve_debug_trap_vmid(struct device_queue_manager *dqm, > struct qcm_process_device *qpd); > int release_debug_trap_vmid(struct device_queue_manager *dqm, > struct qcm_process_device *qpd); > +int debug_lock_and_unmap(struct device_queue_manager *dqm); > +int debug_map_and_unlock(struct device_queue_manager *dqm); > +int debug_refresh_runlist(struct device_queue_manager *dqm); > > static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) > { > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > index 363cf8e005cc..f19c506da23d 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c > @@ -88,6 +88,10 @@ static int pm_map_process_aldebaran(struct packet_manager *pm, > { > struct pm4_mes_map_process_aldebaran *packet; > uint64_t vm_page_table_base_addr = qpd->page_table_base; > + struct kfd_dev *kfd = pm->dqm->dev; > + struct kfd_process_device *pdd = > + container_of(qpd, struct kfd_process_device, qpd); > + int i; > > packet = (struct pm4_mes_map_process_aldebaran *)buffer; > memset(buffer, 0, sizeof(struct pm4_mes_map_process_aldebaran)); > @@ -102,6 +106,17 @@ static int pm_map_process_aldebaran(struct packet_manager *pm, > packet->bitfields14.num_oac = qpd->num_oac; > packet->bitfields14.sdma_enable = 1; > packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count; > + /* TRAP_EN is set on boot so keep it set in non-debug mode. */ I don't understand how the comment relates to the code here. Where is that TRAP_ENABLE bit being set or preserved? Regards, Felix > + packet->spi_gdbg_per_vmid_cntl = pdd->spi_dbg_override | > + pdd->spi_dbg_launch_mode; > + > + if (pdd->process->debug_trap_enabled) { > + for (i = 0; i < kfd->device_info.num_of_watch_points; i++) > + packet->tcp_watch_cntl[i] = pdd->watch_points[i]; > + > + packet->bitfields2.single_memops = > + !!(pdd->process->dbg_flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP); > + } > > packet->sh_mem_config = qpd->sh_mem_config; > packet->sh_mem_bases = qpd->sh_mem_bases; > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h > index d557a7ae756c..8f1e2f9023db 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h > @@ -782,6 +782,12 @@ struct kfd_process_device { > uint64_t faults; > uint64_t page_in; > uint64_t page_out; > + > + /* Tracks debug per-vmid request settings */ > + uint32_t spi_dbg_override; > + uint32_t spi_dbg_launch_mode; > + uint32_t watch_points[4]; > + > /* > * If this process has been checkpointed before, then the user > * application will use the original gpu_id on the > @@ -918,6 +924,9 @@ struct kfd_process { > > bool xnack_enabled; > > + /* Tracks debug per-vmid request for debug flags */ > + bool dbg_flags; > + > /* Work area for debugger event writer worker. */ > struct work_struct debug_event_workarea; > > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c > index e935158ab311..94c6545a58b4 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c > @@ -1556,6 +1556,11 @@ struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, > } > > p->pdds[p->n_pdds++] = pdd; > + if (kfd_dbg_is_per_vmid_supported(pdd->dev)) > + pdd->spi_dbg_override = pdd->dev->kfd2kgd->disable_debug_trap( > + pdd->dev->adev, > + false, > + 0); > > /* Init idr used for memory handle translation */ > idr_init(&pdd->alloc_idr);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h index 8aa7a3ad4e97..53c5a3e55bd2 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h @@ -32,5 +32,12 @@ int kfd_dbg_trap_disable(struct kfd_process *target); int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd, void __user *runtime_info, uint32_t *runtime_info_size); + +static inline bool kfd_dbg_is_per_vmid_supported(struct kfd_dev *dev) +{ + return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2); +} + void debug_event_write_work_handler(struct work_struct *work); + #endif diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index 0cd3a5e9ff25..2517716d7cbc 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -2554,6 +2554,56 @@ int release_debug_trap_vmid(struct device_queue_manager *dqm, return r; } +int debug_lock_and_unmap(struct device_queue_manager *dqm) +{ + int r; + + if (dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { + pr_err("Unsupported on sched_policy: %i\n", dqm->sched_policy); + return -EINVAL; + } + + if (!kfd_dbg_is_per_vmid_supported(dqm->dev)) + return 0; + + dqm_lock(dqm); + + r = unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0, 0, false); + if (r) + dqm_unlock(dqm); + + return r; +} + +int debug_map_and_unlock(struct device_queue_manager *dqm) +{ + int r; + + if (dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) { + pr_err("Unsupported on sched_policy: %i\n", dqm->sched_policy); + return -EINVAL; + } + + if (!kfd_dbg_is_per_vmid_supported(dqm->dev)) + return 0; + + r = map_queues_cpsch(dqm); + + dqm_unlock(dqm); + + return r; +} + +int debug_refresh_runlist(struct device_queue_manager *dqm) +{ + int r = debug_lock_and_unmap(dqm); + + if (r) + return r; + + return debug_map_and_unlock(dqm); +} + #if defined(CONFIG_DEBUG_FS) static void seq_reg_dump(struct seq_file *m, diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h index 0cb1504d24cf..bef3be84c5cc 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h @@ -286,6 +286,9 @@ int reserve_debug_trap_vmid(struct device_queue_manager *dqm, struct qcm_process_device *qpd); int release_debug_trap_vmid(struct device_queue_manager *dqm, struct qcm_process_device *qpd); +int debug_lock_and_unmap(struct device_queue_manager *dqm); +int debug_map_and_unlock(struct device_queue_manager *dqm); +int debug_refresh_runlist(struct device_queue_manager *dqm); static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) { diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c index 363cf8e005cc..f19c506da23d 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c @@ -88,6 +88,10 @@ static int pm_map_process_aldebaran(struct packet_manager *pm, { struct pm4_mes_map_process_aldebaran *packet; uint64_t vm_page_table_base_addr = qpd->page_table_base; + struct kfd_dev *kfd = pm->dqm->dev; + struct kfd_process_device *pdd = + container_of(qpd, struct kfd_process_device, qpd); + int i; packet = (struct pm4_mes_map_process_aldebaran *)buffer; memset(buffer, 0, sizeof(struct pm4_mes_map_process_aldebaran)); @@ -102,6 +106,17 @@ static int pm_map_process_aldebaran(struct packet_manager *pm, packet->bitfields14.num_oac = qpd->num_oac; packet->bitfields14.sdma_enable = 1; packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count; + /* TRAP_EN is set on boot so keep it set in non-debug mode. */ + packet->spi_gdbg_per_vmid_cntl = pdd->spi_dbg_override | + pdd->spi_dbg_launch_mode; + + if (pdd->process->debug_trap_enabled) { + for (i = 0; i < kfd->device_info.num_of_watch_points; i++) + packet->tcp_watch_cntl[i] = pdd->watch_points[i]; + + packet->bitfields2.single_memops = + !!(pdd->process->dbg_flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP); + } packet->sh_mem_config = qpd->sh_mem_config; packet->sh_mem_bases = qpd->sh_mem_bases; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h index d557a7ae756c..8f1e2f9023db 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h @@ -782,6 +782,12 @@ struct kfd_process_device { uint64_t faults; uint64_t page_in; uint64_t page_out; + + /* Tracks debug per-vmid request settings */ + uint32_t spi_dbg_override; + uint32_t spi_dbg_launch_mode; + uint32_t watch_points[4]; + /* * If this process has been checkpointed before, then the user * application will use the original gpu_id on the @@ -918,6 +924,9 @@ struct kfd_process { bool xnack_enabled; + /* Tracks debug per-vmid request for debug flags */ + bool dbg_flags; + /* Work area for debugger event writer worker. */ struct work_struct debug_event_workarea; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c index e935158ab311..94c6545a58b4 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c @@ -1556,6 +1556,11 @@ struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, } p->pdds[p->n_pdds++] = pdd; + if (kfd_dbg_is_per_vmid_supported(pdd->dev)) + pdd->spi_dbg_override = pdd->dev->kfd2kgd->disable_debug_trap( + pdd->dev->adev, + false, + 0); /* Init idr used for memory handle translation */ idr_init(&pdd->alloc_idr);
Unlike single process debug devices, multi-process debug devices allow debug mode setting per-VMID (non-device-global). Because the HWS manages PASID-VMID mapping, the new MAP_PROCESS API allows the KFD to forward the required SPI debug register write requests. To request a new debug mode setting change, the KFD must be able to preempt all queues then remap all queues with these new setting requests for MAP_PROCESS to take effect. Note that by default, trap enablement in non-debug mode must be disabled for performance reasons for multi-process debug devices due to setup overhead in FW. v2: remove asic family code name comment in per vmid support check Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> --- drivers/gpu/drm/amd/amdkfd/kfd_debug.h | 7 +++ .../drm/amd/amdkfd/kfd_device_queue_manager.c | 50 +++++++++++++++++++ .../drm/amd/amdkfd/kfd_device_queue_manager.h | 3 ++ .../drm/amd/amdkfd/kfd_packet_manager_v9.c | 15 ++++++ drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 9 ++++ drivers/gpu/drm/amd/amdkfd/kfd_process.c | 5 ++ 6 files changed, 89 insertions(+)