| Message ID | 20230202025249.905942-1-ashutosh.dixit@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/hwmon: Enable PL1 power limit | expand |
looks good to me, but could you please add bpsec# to commit log? Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> On 2/2/23 4:52 AM, Ashutosh Dixit wrote: > Previous documentation suggested that PL1 power limit is always > enabled. However we now find this not to be the case on some > platforms (such as ATSM). Therefore enable PL1 power limit during hwmon > initialization. > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > --- > drivers/gpu/drm/i915/i915_hwmon.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c > index 1225bc432f0d5..4683a5b96eff1 100644 > --- a/drivers/gpu/drm/i915/i915_hwmon.c > +++ b/drivers/gpu/drm/i915/i915_hwmon.c > @@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915) > for_each_gt(gt, i915, i) > hwm_energy(&hwmon->ddat_gt[i], &energy); > } > + > + /* Enable PL1 power limit */ > + if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit)) > + hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit, > + PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN); > } > > void i915_hwmon_register(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c index 1225bc432f0d5..4683a5b96eff1 100644 --- a/drivers/gpu/drm/i915/i915_hwmon.c +++ b/drivers/gpu/drm/i915/i915_hwmon.c @@ -687,6 +687,11 @@ hwm_get_preregistration_info(struct drm_i915_private *i915) for_each_gt(gt, i915, i) hwm_energy(&hwmon->ddat_gt[i], &energy); } + + /* Enable PL1 power limit */ + if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit)) + hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit, + PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN); } void i915_hwmon_register(struct drm_i915_private *i915)
Previous documentation suggested that PL1 power limit is always enabled. However we now find this not to be the case on some platforms (such as ATSM). Therefore enable PL1 power limit during hwmon initialization. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> --- drivers/gpu/drm/i915/i915_hwmon.c | 5 +++++ 1 file changed, 5 insertions(+)