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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id x22-20020a1c7c16000000b003e8dc7a03basm2772434wmc.41.2023.03.09.06.23.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 06:23:06 -0800 (PST) From: Alexandre Mergnat Date: Thu, 09 Mar 2023 15:22:58 +0100 Subject: [PATCH 09/21] dt-bindings: display: mediatek: ovl: add binding for MT8365 SoC MIME-Version: 1.0 Message-Id: <20230220-display-v1-9-45cbc68e188b@baylibre.com> References: <20230220-display-v1-0-45cbc68e188b@baylibre.com> In-Reply-To: <20230220-display-v1-0-45cbc68e188b@baylibre.com> To: =?unknown-8bit?b?RGFuaWVsIFZldHRlciA8ZGFuaWVsQGZmd2xsLmNoPiwgQ0sgSHUg?= =?unknown-8bit?b?PGNrLmh1QG1lZGlhdGVrLmNvbT4sIEppdGFvIFNoaSA8aml0YW8uc2hp?= =?unknown-8bit?b?QG1lZGlhdGVrLmNvbT4s?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C_Phi?= =?unknown-8bit?q?lipp_Zabel_=3Cp=2Ezabel=40pengutronix=2Ede=3E=2C_Sam_Ravnb?= =?unknown-8bit?q?org_=3Csam=40ravnborg=2Eorg=3E=2C?= =?unknown-8bit?q?_Rob_Herring_=3Crobh+dt=40kernel=2Eorg=3E=2C_Uwe_Kleine-K?= =?unknown-8bit?q?=C3=B6nig_=3Cu=2Ekleine-koenig=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Chun-Kuang_Hu_=3Cchunkuang=2Ehu=40kernel=2Eorg=3E=2C_Matth?= =?unknown-8bit?q?ias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C_David_Ai?= =?unknown-8bit?q?rlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+dt=40linaro?= =?unknown-8bit?q?=2Eorg=3E=2C_Xinlei_Lee_=3Cxinlei=2Elee=40mediatek=2Ecom?= =?unknown-8bit?q?=3E?= X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=863; i=amergnat@baylibre.com; h=from:subject:message-id; bh=f+LlFWqL4iGgBIpxFelONT6kK+k+XvcRswfNvN3MNAo=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkCeu+di7JzQQWl74+GKipXG0KRdPPts/MfRxqEUVj mCLLlwKJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAnrvgAKCRArRkmdfjHURYYNEA CiXLD4ykIDwMU7sPiuItu/LUUcOiha1Izgc6NlWsxwBtccyIEZOxGxwTYFe/zYzCasLTRY/ux4E0F7 /B75r5GMN3ef5WSWHAmw/1ogSmADe9IN+pIyoVoyAYewx+upkEDW9iXk9IH11rGJ3xxfaQSy5/Ww6k 4kdB20shkoPrF4yHBs4kKBKFwHMf0gnNqxG6SwGqiI/hhI//4jMAE1//hUbefOCylvKZk4dUdA7gwV VjAISC7+SEmpuYuK84ami0QwftaIgZq9XZsjdV5N9iJXIxIOcDcpynPSR2EgZmTmFjg0Ce7I2Cv8ua 3M2sY5K7ovJyJ6Z8aN0zRdj46P2n6XViqiqD9vi07vJxj/yQCcJeCgPvcRdel8ahAuFiaTL/sWxdGm 8g6ldbUOu+JbKnteOZQtwp5vifrRz75asn0P1YuaQkuYzGVwLGt4Qj62xTtWkdM9qPkfa5mGmAKI8v BsoPIdLdz16pcViwP6bkRftEoP1y9+URkKPYore33ra9xLX49V4pTuPhMVoGmaDZWCKqz0CtYtiUb6 uapQIS/7ycwhGVDvTYtg2DiH1gFld9VWQoKjqwDdbrqf5pQGfwQOmrZqexT61gdtajcNn8PzoUXVC9 My54ek3cXzXKpB7xh/HxWpqAprRIskSMxwuKvvLPhPbUThj1YvCFXTdhYoUQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Alexandre Mergnat , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pwm@vger.kernel.org, Fabien Parent , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Guillaume La Roque , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Display Overlay for MT8365 is compatible with another SoC. Then, add MT8365 binding along with MT8192 SoC. Signed-off-by: Alexandre Mergnat Acked-by: Krzysztof Kozlowski Reviewed-by: Chun-Kuang Hu --- Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index a2a27d0ca038..20e4ca4fc915 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -41,6 +41,7 @@ properties: - items: - enum: - mediatek,mt8186-disp-ovl + - mediatek,mt8365-disp-ovl - const: mediatek,mt8192-disp-ovl reg: