| Message ID | 20230223-topic-gmuwrapper-v3-1-5be55a336819@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | GMU-less A6xx support (A610, A619_holi) | expand |
On 23.02.2023 13:06, Konrad Dybcio wrote: > GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be > specified under the GPU node, just like their older cousins. > Account for that. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- [...] > - then: # Since Adreno 6xx series clocks should be defined in GMU > + enum: > + - qcom,adreno-610.0 > + - qcom,adreno-619.1 Immediate comment: this could be improved by checking the compatible of the node referenced in qcom,gmu, but frankly - I have no idea how to do this / whether it's possible with schema. Konrad > + then: > properties: > - clocks: false > - clock-names: false > + clock-names: > + items: > + - const: core > + description: GPU Core clock > + - const: iface > + description: GPU Interface clock > + - const: mem_iface > + description: GPU Memory Interface clock > + - const: alt_mem_iface > + description: GPU Alternative Memory Interface clock > + - const: gmu > + description: CX GMU clock > + - const: xo > + description: GPUCC clocksource clock > + > + reg-names: > + minItems: 1 > + items: > + - const: kgsl_3d0_reg_memory > + - const: cx_dbgc > + > + required: > + - clocks > + - clock-names > + else: > + if: > + properties: > + compatible: > + contains: > + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' > + > + then: # Starting with A6xx, the clocks are usually defined in the GMU node > + properties: > + clocks: false > + clock-names: false > + > + reg-names: > + minItems: 1 > + items: > + - const: kgsl_3d0_reg_memory > + - const: cx_mem > + - const: cx_dbgc > > examples: > - | >
On 23/02/2023 13:06, Konrad Dybcio wrote: > GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be > specified under the GPU node, just like their older cousins. > Account for that. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > .../devicetree/bindings/display/msm/gpu.yaml | 63 ++++++++++++++++++---- > 1 file changed, 53 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index d4191cca71fb..e6d3160601bc 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -36,10 +36,7 @@ properties: > > reg-names: > minItems: 1 > - items: > - - const: kgsl_3d0_reg_memory > - - const: cx_mem > - - const: cx_dbgc > + maxItems: 3 > > interrupts: > maxItems: 1 > @@ -147,26 +144,72 @@ allOf: > description: GPU Alternative Memory Interface clock > - const: gfx3d > description: GPU 3D engine clock > + - const: gmu > + description: CX GMU clock > - const: rbbmtimer > description: GPU RBBM Timer for Adreno 5xx series > - const: rbcpr > description: GPU RB Core Power Reduction clock > + - const: xo > + description: GPUCC clocksource clock > minItems: 2 > - maxItems: 7 > + maxItems: 9 Your commit says A6xx but this is a3-5xx. I don't understand this change. > > required: > - clocks > - clock-names > + > - if: > properties: > compatible: > contains: > - pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' > - > - then: # Since Adreno 6xx series clocks should be defined in GMU > + enum: > + - qcom,adreno-610.0 > + - qcom,adreno-619.1 > + then: > properties: > - clocks: false > - clock-names: false > + clock-names: > + items: > + - const: core > + description: GPU Core clock > + - const: iface > + description: GPU Interface clock > + - const: mem_iface > + description: GPU Memory Interface clock > + - const: alt_mem_iface > + description: GPU Alternative Memory Interface clock > + - const: gmu > + description: CX GMU clock > + - const: xo > + description: GPUCC clocksource clock > + > + reg-names: > + minItems: 1 > + items: > + - const: kgsl_3d0_reg_memory > + - const: cx_dbgc > + > + required: > + - clocks > + - clock-names > + else: > + if: > + properties: > + compatible: > + contains: > + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' > + > + then: # Starting with A6xx, the clocks are usually defined in the GMU node The comment is not accurate anymore. Best regards, Krzysztof
On 24.02.2023 12:17, Krzysztof Kozlowski wrote: > On 23/02/2023 13:06, Konrad Dybcio wrote: >> GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be >> specified under the GPU node, just like their older cousins. >> Account for that. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> .../devicetree/bindings/display/msm/gpu.yaml | 63 ++++++++++++++++++---- >> 1 file changed, 53 insertions(+), 10 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> index d4191cca71fb..e6d3160601bc 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> @@ -36,10 +36,7 @@ properties: >> >> reg-names: >> minItems: 1 >> - items: >> - - const: kgsl_3d0_reg_memory >> - - const: cx_mem >> - - const: cx_dbgc >> + maxItems: 3 >> >> interrupts: >> maxItems: 1 >> @@ -147,26 +144,72 @@ allOf: >> description: GPU Alternative Memory Interface clock >> - const: gfx3d >> description: GPU 3D engine clock >> + - const: gmu >> + description: CX GMU clock >> - const: rbbmtimer >> description: GPU RBBM Timer for Adreno 5xx series >> - const: rbcpr >> description: GPU RB Core Power Reduction clock >> + - const: xo >> + description: GPUCC clocksource clock >> minItems: 2 >> - maxItems: 7 >> + maxItems: 9 > > Your commit says A6xx but this is a3-5xx. I don't understand this change. Right, it's a leftover unrelated hunk. I'll remove it. > >> >> required: >> - clocks >> - clock-names >> + >> - if: >> properties: >> compatible: >> contains: >> - pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' >> - >> - then: # Since Adreno 6xx series clocks should be defined in GMU >> + enum: >> + - qcom,adreno-610.0 >> + - qcom,adreno-619.1 >> + then: >> properties: >> - clocks: false >> - clock-names: false >> + clock-names: >> + items: >> + - const: core >> + description: GPU Core clock >> + - const: iface >> + description: GPU Interface clock >> + - const: mem_iface >> + description: GPU Memory Interface clock >> + - const: alt_mem_iface >> + description: GPU Alternative Memory Interface clock >> + - const: gmu >> + description: CX GMU clock >> + - const: xo >> + description: GPUCC clocksource clock >> + >> + reg-names: >> + minItems: 1 >> + items: >> + - const: kgsl_3d0_reg_memory >> + - const: cx_dbgc >> + >> + required: >> + - clocks >> + - clock-names >> + else: >> + if: >> + properties: >> + compatible: >> + contains: >> + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' >> + >> + then: # Starting with A6xx, the clocks are usually defined in the GMU node > > The comment is not accurate anymore. I'll argue the semantics, they are still "usually" defined in the GMU node.. Konrad > > > Best regards, > Krzysztof >
On 24/02/2023 12:51, Konrad Dybcio wrote: >>> + else: >>> + if: >>> + properties: >>> + compatible: >>> + contains: >>> + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' >>> + >>> + then: # Starting with A6xx, the clocks are usually defined in the GMU node >> >> The comment is not accurate anymore. > I'll argue the semantics, they are still "usually" defined > in the GMU node.. Ah, usually. It's fine then. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index d4191cca71fb..e6d3160601bc 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -36,10 +36,7 @@ properties: reg-names: minItems: 1 - items: - - const: kgsl_3d0_reg_memory - - const: cx_mem - - const: cx_dbgc + maxItems: 3 interrupts: maxItems: 1 @@ -147,26 +144,72 @@ allOf: description: GPU Alternative Memory Interface clock - const: gfx3d description: GPU 3D engine clock + - const: gmu + description: CX GMU clock - const: rbbmtimer description: GPU RBBM Timer for Adreno 5xx series - const: rbcpr description: GPU RB Core Power Reduction clock + - const: xo + description: GPUCC clocksource clock minItems: 2 - maxItems: 7 + maxItems: 9 required: - clocks - clock-names + - if: properties: compatible: contains: - pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' - - then: # Since Adreno 6xx series clocks should be defined in GMU + enum: + - qcom,adreno-610.0 + - qcom,adreno-619.1 + then: properties: - clocks: false - clock-names: false + clock-names: + items: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: gmu + description: CX GMU clock + - const: xo + description: GPUCC clocksource clock + + reg-names: + minItems: 1 + items: + - const: kgsl_3d0_reg_memory + - const: cx_dbgc + + required: + - clocks + - clock-names + else: + if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' + + then: # Starting with A6xx, the clocks are usually defined in the GMU node + properties: + clocks: false + clock-names: false + + reg-names: + minItems: 1 + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + - const: cx_dbgc examples: - |
GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be specified under the GPU node, just like their older cousins. Account for that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- .../devicetree/bindings/display/msm/gpu.yaml | 63 ++++++++++++++++++---- 1 file changed, 53 insertions(+), 10 deletions(-)