| Message ID | 20230223-topic-gmuwrapper-v8-17-69c68206609e@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | GMU-less A6xx support (A610, A619_holi) | expand |
On Mon, May 29, 2023 at 03:52:36PM +0200, Konrad Dybcio wrote: > > A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375 > (blair). This is what seems to be a first occurrence of this happening, > but it's easy to overcome by guarding the SoC-specific fuse values with > of_machine_is_compatible(). Do just that to enable frequency limiting > on these SoCs. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> -Akhil > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index ca4ffa44097e..d046af5f6de2 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -2110,6 +2110,34 @@ static u32 a618_get_speed_bin(u32 fuse) > return UINT_MAX; > } > > +static u32 a619_holi_get_speed_bin(u32 fuse) > +{ > + /* > + * There are (at least) two SoCs implementing A619_holi: SM4350 (holi) > + * and SM6375 (blair). Limit the fuse matching to the corresponding > + * SoC to prevent bogus frequency setting (as improbable as it may be, > + * given unexpected fuse values are.. unexpected! But still possible.) > + */ > + > + if (fuse == 0) > + return 0; > + > + if (of_machine_is_compatible("qcom,sm4350")) { > + if (fuse == 138) > + return 1; > + else if (fuse == 92) > + return 2; > + } else if (of_machine_is_compatible("qcom,sm6375")) { > + if (fuse == 190) > + return 1; > + else if (fuse == 177) > + return 2; > + } else > + pr_warn("Unknown SoC implementing A619_holi!\n"); > + > + return UINT_MAX; > +} > + > static u32 a619_get_speed_bin(u32 fuse) > { > if (fuse == 0) > @@ -2170,6 +2198,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3 > if (adreno_is_a618(adreno_gpu)) > val = a618_get_speed_bin(fuse); > > + else if (adreno_is_a619_holi(adreno_gpu)) > + val = a619_holi_get_speed_bin(fuse); > + > else if (adreno_is_a619(adreno_gpu)) > val = a619_get_speed_bin(fuse); > > > -- > 2.40.1 >
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index ca4ffa44097e..d046af5f6de2 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2110,6 +2110,34 @@ static u32 a618_get_speed_bin(u32 fuse) return UINT_MAX; } +static u32 a619_holi_get_speed_bin(u32 fuse) +{ + /* + * There are (at least) two SoCs implementing A619_holi: SM4350 (holi) + * and SM6375 (blair). Limit the fuse matching to the corresponding + * SoC to prevent bogus frequency setting (as improbable as it may be, + * given unexpected fuse values are.. unexpected! But still possible.) + */ + + if (fuse == 0) + return 0; + + if (of_machine_is_compatible("qcom,sm4350")) { + if (fuse == 138) + return 1; + else if (fuse == 92) + return 2; + } else if (of_machine_is_compatible("qcom,sm6375")) { + if (fuse == 190) + return 1; + else if (fuse == 177) + return 2; + } else + pr_warn("Unknown SoC implementing A619_holi!\n"); + + return UINT_MAX; +} + static u32 a619_get_speed_bin(u32 fuse) { if (fuse == 0) @@ -2170,6 +2198,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3 if (adreno_is_a618(adreno_gpu)) val = a618_get_speed_bin(fuse); + else if (adreno_is_a619_holi(adreno_gpu)) + val = a619_holi_get_speed_bin(fuse); + else if (adreno_is_a619(adreno_gpu)) val = a619_get_speed_bin(fuse);