From patchwork Mon Mar 20 19:41:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13181786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69953C6FD1C for ; Mon, 20 Mar 2023 19:42:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2BA8210E63D; Mon, 20 Mar 2023 19:42:53 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9EA8A10E65E; Mon, 20 Mar 2023 19:42:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679341371; x=1710877371; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cUcc6Fqt3EWZemIBUVp1TQIXbU+XFWDL5C3YQbE7nJE=; b=Y57DDfToy1EFJBjLSVAYaaXPQIe98K6x00xA1nwumLnkBtHusRDhgoZ8 xYohrE/T9VPmHd9SbAmnIRw5MI8JGnycJrsUGQ9/S45waJ0RHC7N7URPO i8e5eATB3/Mqw/1MSyd1TU0g7V0zpCBGwOwW8bz0sWspX79+UDqLMTSLm zWhkhFXe8MZnBk3F0OYBNwI36yEela3T6vP2OvjXA1zCnHGKivF9uRn7O Oek7UrIr8E0vdZJAPIYB1V5DYJghoNrTlhf8OGDC1/H/XjNhBfWP4b+B1 qzMdsjt7mFPMTSKhgijDY49O86U1utFIt74AJ2zcQfZAQ16ta+W65LYVt w==; X-IronPort-AV: E=McAfee;i="6600,9927,10655"; a="338790407" X-IronPort-AV: E=Sophos;i="5.98,276,1673942400"; d="scan'208";a="338790407" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2023 12:42:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10655"; a="745517989" X-IronPort-AV: E=Sophos;i="5.98,276,1673942400"; d="scan'208";a="745517989" Received: from ggranovs-mobl1.ger.corp.intel.com (HELO intel.com) ([10.252.60.202]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2023 12:42:49 -0700 From: Andi Shyti To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Jonathan Cavitt Subject: [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation Date: Mon, 20 Mar 2023 20:41:18 +0100 Message-Id: <20230320194119.290561-2-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320194119.290561-1-andi.shyti@linux.intel.com> References: <20230320194119.290561-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andi Shyti , Andi Shyti , Nirmoy Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Jonathan Cavitt All memory traffic must be quiesced before requesting an aux invalidation on platforms that use Aux CCS. Signed-off-by: Jonathan Cavitt Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c index e1c76e5bfa827..6f830f80eb0f8 100644 --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c @@ -181,6 +181,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) { struct intel_engine_cs *engine = rq->engine; + /* + * Aux invalidations on Aux CCS platforms require + * memory traffic is quiesced prior. + */ + if (!HAS_FLAT_CCS(engine->i915)) + mode |= EMIT_FLUSH; + if (mode & EMIT_FLUSH) { u32 flags = 0; u32 *cs;