From patchwork Wed Apr 12 11:27:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13208928 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23116C77B76 for ; Wed, 12 Apr 2023 11:28:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EEF710E377; Wed, 12 Apr 2023 11:28:22 +0000 (UTC) Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4231210E785 for ; Wed, 12 Apr 2023 11:28:09 +0000 (UTC) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id CC6AD6603293; Wed, 12 Apr 2023 12:28:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1681298888; bh=YwKUdOVKZZzufL6XAsjNHZkwVMbtCnbLx+vv25vZV7Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ThQsw1AyvAaKbhdVCeXKcuOhCjk4B3E8RVURtjINGdM3o3KF7OXl1HlCihY8BZbRn E2/NgcXGbmGeIonXpL+opqEraPvZ/DZ3zGgVnj9FxcvG5iNmEdK7yjqz2LFuO2vc5g TS+RjQ2Dr3vStagSaSZdES6eM7238BU0OJf5Nh8oLMpUFlMwgEI9lmR91/uyDLpqin 8/2i4Z8Z03+aTffVbZYDNxHDc3vq8x7gtGXf5jKWCzANNxzghLSXhjJMkMBO0pdxur 0pUzph5yMDkbZmw4zwTzhiwlqUS7IsEZs6IYtvwAO/WLWCEopm3p7XYAnQrkHvLClO VMFxq4GIS4W2g== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Subject: [PATCH 16/27] arm64: dts: mediatek: mt6795: Add support for the CMDQ/GCE mailbox Date: Wed, 12 Apr 2023 13:27:28 +0200 Message-Id: <20230412112739.160376-17-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230412112739.160376-1-angelogioacchino.delregno@collabora.com> References: <20230412112739.160376-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, thierry.reding@gmail.com, krzysztof.kozlowski+dt@linaro.org, linux-phy@lists.infradead.org, kernel@collabora.com, kishon@kernel.org, phone-devel@vger.kernel.org, jassisinghbrar@gmail.com, linux-pwm@vger.kernel.org, u.kleine-koenig@pengutronix.de, chunkuang.hu@kernel.org, jitao.shi@mediatek.com, xinlei.lee@mediatek.com, houlong.wei@mediatek.com, chunfeng.yun@mediatek.com, robh+dt@kernel.org, linux-mediatek@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com, linux-kernel@vger.kernel.org, vkoul@kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 090400d7fd61..99cc4918e6ba 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -401,6 +402,15 @@ fhctl: clock-controller@10209f00 { status = "disabled"; }; + gce: mailbox@10212000 { + compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce"; + reg = <0 0x10212000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + #mbox-cells = <2>; + }; + gic: interrupt-controller@10221000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;