From patchwork Fri Apr 21 17:37:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Fei" X-Patchwork-Id: 13220485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77C72C77B76 for ; Fri, 21 Apr 2023 17:37:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C2EB810EE84; Fri, 21 Apr 2023 17:36:52 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDCC410E274; Fri, 21 Apr 2023 17:36:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682098610; x=1713634610; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3ZNmm4gyl1v+oHMmQGVidi6RVePQPzwihfDIsKK1pEw=; b=YKd8qnvdwSMlPBgVNtQZVXHTjsOhnZ+u0mirAiGULd20gsPt89GaYnWF Wn9wyWmBvuOZpqjnEqmm4DtEy+bLJdWaD17+QDnCAcf7cvZaNUCESNYR6 3b/XbHxtslHfUki9dW3zjLgnzo4R7IJdn8kRP88fgT3RY4MCdy5wTtUqA Sm3L9EcOORRjO6KEUu15ZMNEcPPDCMMu7cXQCQYV3QuXMDuWGZ/nPuIRe k7uev7omutHNz1GtmMxgOEcI4iSW+KdEXVziVt0OrxNtHshJn8p6MNKRK JhAQytWzfaNT89Ly0V+CAPj3vHHkq/lc0CFZAdgAfG+Wy9Ks2WmvRt/7Z w==; X-IronPort-AV: E=McAfee;i="6600,9927,10687"; a="347949459" X-IronPort-AV: E=Sophos;i="5.99,214,1677571200"; d="scan'208";a="347949459" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2023 10:36:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10687"; a="669794794" X-IronPort-AV: E=Sophos;i="5.99,214,1677571200"; d="scan'208";a="669794794" Received: from fyang16-desk.jf.intel.com ([10.24.96.243]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2023 10:36:49 -0700 From: fei.yang@intel.com To: intel-gfx@lists.freedesktop.org Subject: [PATCH v4 2/8] drm/i915/mtl: fix mocs selftest Date: Fri, 21 Apr 2023 10:37:55 -0700 Message-Id: <20230421173801.3369303-3-fei.yang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230421173801.3369303-1-fei.yang@intel.com> References: <20230421173801.3369303-1-fei.yang@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matt Roper , Fei Yang , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Fei Yang Media GT has a different base for MOCS register, need to apply gsi_offset to the mmio address if not using the intel_uncore_r/w functions for register access. Cc: Matt Roper Signed-off-by: Fei Yang Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/gt/selftest_mocs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c index ca009a6a13bd..a8446ab82501 100644 --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c @@ -131,13 +131,14 @@ static int read_mocs_table(struct i915_request *rq, const struct drm_i915_mocs_table *table, u32 *offset) { + struct intel_gt *gt = rq->engine->gt; u32 addr; if (!table) return 0; if (HAS_GLOBAL_MOCS_REGISTERS(rq->engine->i915)) - addr = global_mocs_offset(); + addr = global_mocs_offset() + gt->uncore->gsi_offset; else addr = mocs_offset(rq->engine);