From patchwork Wed May 3 11:49:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13230106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0082EC7EE22 for ; Wed, 3 May 2023 11:49:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F9B610E2B9; Wed, 3 May 2023 11:49:39 +0000 (UTC) Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D39610E287 for ; Wed, 3 May 2023 11:49:36 +0000 (UTC) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 635D566056CE; Wed, 3 May 2023 12:49:34 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1683114575; bh=mggFqVfO07gYKRMiPgSXOxkB4pkeawkKaQOM7tL9KCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DGRvSrrAURs+H12ngOMJt++7Rzz9AuBQmS7QmJixC+o+gfkIZApSkP0dULtrUt9e1 zmRFiDUly8cwdd+MKdZQ5QDDYdlPE0TVvsNbCyaDAHs8crmSEF/HcZkRF64Dfbod49 1Wq2WCIA5DuzgoraAHim511d2MD7CoOHZ4Ec+rwUG7iw1nUZmXONMTW28Ss0e3ajGK Y0QPyMuCHDuxtCUcArHiLRd6C8mF5l9bigh53tzgN52B6mtqrNO/OUaK6VH8uw+Nxu 9FxU6nI3YnfhPAJBWglWdT7+KhO7ana72E1e3ZC/xaWIZaWzWQRXkH5v762f9fuvON F+AF/At7dSyBQ== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Subject: [PATCH v2 06/11] drm/mediatek: gamma: Use bitfield macros Date: Wed, 3 May 2023 13:49:18 +0200 Message-Id: <20230503114923.156985-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230503114923.156985-1-angelogioacchino.delregno@collabora.com> References: <20230503114923.156985-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, matthias.bgg@gmail.com, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Make the code more robust and improve readability by using bitfield macros instead of open coding bit operations. While at it, also add a definition for LUT_BITS_DEFAULT. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++++++++++++++--------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c index 97b34963ef73..1436e2c860cb 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 MediaTek Inc. */ +#include #include #include #include @@ -22,9 +23,16 @@ #define GAMMA_LUT_EN BIT(1) #define GAMMA_DITHERING BIT(2) #define DISP_GAMMA_SIZE 0x0030 +#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16) +#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0) #define DISP_GAMMA_LUT 0x0700 +#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20) +#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10) +#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0) + #define LUT_10BIT_MASK 0x03ff +#define LUT_BITS_DEFAULT 10 #define LUT_SIZE_DEFAULT 512 /* for setting gamma lut from AAL */ struct mtk_disp_gamma_data { @@ -96,33 +104,33 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt for (i = 0; i < lut_size; i++) { struct drm_color_lut diff, hwlut; - hwlut.red = drm_color_lut_extract(lut[i].red, 10); - hwlut.green = drm_color_lut_extract(lut[i].green, 10); - hwlut.red = drm_color_lut_extract(lut[i].blue, 10); + hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT); + hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT); + hwlut.red = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT); if (!lut_diff || (i % 2 == 0)) { - word = hwlut.red << 20 + - hwlut.green << 10 + - hwlut.red; + word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); } else { diff.red = lut[i].red - lut[i - 1].red; - diff.red = drm_color_lut_extract(diff.red, 10); + diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT); diff.green = lut[i].green - lut[i - 1].green; - diff.green = drm_color_lut_extract(diff.green, 10); + diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT); diff.blue = lut[i].blue - lut[i - 1].blue; - diff.blue = drm_color_lut_extract(diff.blue, 10); + diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT); - word = diff.blue << 20 + - diff.green << 10 + - diff.red; + word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); } writel(word, (lut_base + i * 4)); } /* Enable the gamma table */ - cfg_val = cfg_val | GAMMA_LUT_EN; + cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1); writel(cfg_val, regs + DISP_GAMMA_CFG); } @@ -139,9 +147,12 @@ void mtk_gamma_config(struct device *dev, unsigned int w, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) { struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + u32 sz; + + sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w); + sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h); - mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, - DISP_GAMMA_SIZE); + mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE); if (gamma->data && gamma->data->has_dither) mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);