| Message ID | 20230503225100.2834222-4-fei.yang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: use pat_index instead of cache_level | expand |
On Wed, May 03, 2023 at 03:51:00PM -0700, fei.yang@intel.com wrote: > From: Fei Yang <fei.yang@intel.com> > > PTE encode is platform dependent. After replacing cache_level with > pat_index, the newly introduced mtl_pte_encode is actually generic > for all gen12 platforms, thus rename it to gen12_pte_encode and > apply it to all gen12 platforms. > > Cc: Chris Wilson <chris.p.wilson@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Fei Yang <fei.yang@intel.com> > Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Bspec: 63019 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> I think it's important to include the bspec reference here since we have so much trouble finding proper documentation on PTE formats (other pages like 45030, 45040, etc. never got updated in a sensible way). Matt > --- > drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > index f2334a713c4e..d1e3d3b90e95 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > @@ -55,9 +55,9 @@ static u64 gen8_pte_encode(dma_addr_t addr, > return pte; > } > > -static u64 mtl_pte_encode(dma_addr_t addr, > - unsigned int pat_index, > - u32 flags) > +static u64 gen12_pte_encode(dma_addr_t addr, > + unsigned int pat_index, > + u32 flags) > { > gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW; > > @@ -995,8 +995,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, > */ > ppgtt->vm.alloc_scratch_dma = alloc_pt_dma; > > - if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) > - ppgtt->vm.pte_encode = mtl_pte_encode; > + if (GRAPHICS_VER(gt->i915) >= 12) > + ppgtt->vm.pte_encode = gen12_pte_encode; > else > ppgtt->vm.pte_encode = gen8_pte_encode; > > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c index f2334a713c4e..d1e3d3b90e95 100644 --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -55,9 +55,9 @@ static u64 gen8_pte_encode(dma_addr_t addr, return pte; } -static u64 mtl_pte_encode(dma_addr_t addr, - unsigned int pat_index, - u32 flags) +static u64 gen12_pte_encode(dma_addr_t addr, + unsigned int pat_index, + u32 flags) { gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW; @@ -995,8 +995,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, */ ppgtt->vm.alloc_scratch_dma = alloc_pt_dma; - if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) - ppgtt->vm.pte_encode = mtl_pte_encode; + if (GRAPHICS_VER(gt->i915) >= 12) + ppgtt->vm.pte_encode = gen12_pte_encode; else ppgtt->vm.pte_encode = gen8_pte_encode;