From patchwork Tue May 9 09:30:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13235519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2C18C77B75 for ; Tue, 9 May 2023 09:31:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E09610E373; Tue, 9 May 2023 09:31:42 +0000 (UTC) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by gabe.freedesktop.org (Postfix) with ESMTPS id 44D6E10E375 for ; Tue, 9 May 2023 09:31:40 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3499UeCa022677; Tue, 9 May 2023 04:30:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683624640; bh=3Q3ciKVeqIMyoHoDpCtW7XsVd4ZVGVikacZK0eWJmZU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FIffJWXWvbgSz+vxJUrj1X+Gkc4uXJiten1ggPhUU0QfHafMGNdxyrjmMl6L2OqcS dm7+Yyqz3JWBMGCdGvIvaBHpex6S8EN3cMEN6hh7mddWVB2w9aJavhuJ4RJQZFcWRI uDpesr4O4J+vJVyhssXe4+ydUjaA2ODgy0nIsg3k= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3499Uejs022235 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 May 2023 04:30:40 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 9 May 2023 04:30:40 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 9 May 2023 04:30:40 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3499UdkR084935; Tue, 9 May 2023 04:30:39 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Jyri Sarha , David Airlie , Daniel Vetter , Laurent Pinchart , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Rahul T R , Swapnil Jakhade , Boris Brezillon , Francesco Dolcini Subject: [PATCH v6 2/8] drm/bridge: tfp410: Set input_bus_flags in atomic_check Date: Tue, 9 May 2023 15:00:30 +0530 Message-ID: <20230509093036.3303-3-a-bhatia1@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230509093036.3303-1-a-bhatia1@ti.com> References: <20230509093036.3303-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Jayesh Choudhary , Vignesh Raghavendra , Devarsh Thakkar , Linux Kernel List , DRI Development List , Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Nikhil Devshatwar input_bus_flags are specified in drm_bridge_timings (legacy) as well as drm_bridge_state->input_bus_cfg.flags The flags from the timings will be deprecated. Bridges are supposed to validate and set the bridge state flags from atomic_check. Implement atomic_check hook for the same. Signed-off-by: Nikhil Devshatwar Reviewed-by: Neil Armstrong --- Notes: changes from v4: * fix a warning Reported-by: kernel test robot changes from v5: * Moved the return statement here from patch 4 (where it was added by mistake). drivers/gpu/drm/bridge/ti-tfp410.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c index 7dacc7e03eee..631ae8f11a77 100644 --- a/drivers/gpu/drm/bridge/ti-tfp410.c +++ b/drivers/gpu/drm/bridge/ti-tfp410.c @@ -228,6 +228,21 @@ static u32 *tfp410_get_input_bus_fmts(struct drm_bridge *bridge, return input_fmts; } +static int tfp410_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct tfp410 *dvi = drm_bridge_to_tfp410(bridge); + + /* + * There might be flags negotiation supported in future. + * Set the bus flags in atomic_check statically for now. + */ + bridge_state->input_bus_cfg.flags = dvi->timings.input_bus_flags; + return 0; +} + static const struct drm_bridge_funcs tfp410_bridge_funcs = { .attach = tfp410_attach, .detach = tfp410_detach, @@ -238,6 +253,7 @@ static const struct drm_bridge_funcs tfp410_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_get_input_bus_fmts = tfp410_get_input_bus_fmts, + .atomic_check = tfp410_atomic_check, }; static const struct drm_bridge_timings tfp410_default_timings = {