From patchwork Tue May 9 14:01:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 13235825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EDCAC7EE22 for ; Tue, 9 May 2023 14:01:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 84EB610E2A5; Tue, 9 May 2023 14:01:24 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTPS id 33CA310E296 for ; Tue, 9 May 2023 14:01:22 +0000 (UTC) X-UUID: f7da6be0ee7111edb20a276fd37b9834-20230509 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=q1/xa42nik0zt26jT44GIBCwJZlsjd2xmitd+zLAJAY=; b=Z4/1F2S+At9MmoOZpV3ZzYVB8GB867D7Ihg7/tM+3KXnWcjgI7mtmF96YPQR0mwf7oBGvOAm191z41ETabkHrb02qArEWjMhJ05hgPrZNpn+940z5hrVCAPmeL2ILWuitEbiYkKsPHJ8plPa+2kMhnhsgCFUomt+jYhJejNPREw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.24, REQID:de78a6cc-24a3-49dd-b2e0-534958ea77ef, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:178d4d4, CLOUDID:c61f416b-2f20-4998-991c-3b78627e4938, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: f7da6be0ee7111edb20a276fd37b9834-20230509 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1789822533; Tue, 09 May 2023 22:01:17 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 9 May 2023 22:01:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 9 May 2023 22:01:16 +0800 From: Jason-JH.Lin To: Chun-Kuang Hu , AngeloGioacchino Del Regno , Alexandre Mergnat Subject: [PATCH 2/2] drm/mediatek: Add DSI support for mt8188 vdosys0 Date: Tue, 9 May 2023 22:01:14 +0800 Message-ID: <20230509140114.6956-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230509140114.6956-1-jason-jh.lin@mediatek.com> References: <20230509140114.6956-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nathan Lu , "Jason-JH . Lin" , Singo Chang , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Rex-BC Chen , Jason-ch Chen , Nancy Lin , Johnson Wang , Shawn Sung , Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add DSI as main display output for mt8188 vdosys0. Signed-off-by: Nathan Lu Signed-off-by: Jason-JH.Lin Reviewed-by: Matthias Brugger --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +++++ drivers/gpu/drm/mediatek/mtk_dsi.c | 9 +++++++++ 4 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 72c57442f965..bf06ccb65652 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -48,6 +48,7 @@ int mtk_dpi_encoder_index(struct device *dev); void mtk_dsi_ddp_start(struct device *dev); void mtk_dsi_ddp_stop(struct device *dev); +int mtk_dsi_encoder_index(struct device *dev); int mtk_gamma_clk_enable(struct device *dev); void mtk_gamma_clk_disable(struct device *dev); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index fe20ce26b19f..214233d36487 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -318,6 +318,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsc = { static const struct mtk_ddp_comp_funcs ddp_dsi = { .start = mtk_dsi_ddp_start, .stop = mtk_dsi_ddp_stop, + .encoder_index = mtk_dsi_encoder_index, }; static const struct mtk_ddp_comp_funcs ddp_gamma = { diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index d8c49614a107..7ea4dc87c558 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -191,8 +191,13 @@ static const unsigned int mt8188_mtk_ddp_main_routes_0[] = { DDP_COMPONENT_DP_INTF0 }; +static const unsigned int mt8188_mtk_ddp_main_routes_1[] = { + DDP_COMPONENT_DSI0 +}; + static const struct mtk_drm_route mt8188_mtk_ddp_main_routes[] = { {0, ARRAY_SIZE(mt8188_mtk_ddp_main_routes_0), mt8188_mtk_ddp_main_routes_0}, + {0, ARRAY_SIZE(mt8188_mtk_ddp_main_routes_1), mt8188_mtk_ddp_main_routes_1}, }; static const unsigned int mt8192_mtk_ddp_main[] = { diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 7d5250351193..f9d2d5447e2e 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -865,6 +865,15 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) return ret; } +int mtk_dsi_encoder_index(struct device *dev) +{ + struct mtk_dsi *dsi = dev_get_drvdata(dev); + int encoder_index = drm_encoder_index(&dsi->encoder); + + dev_dbg(dev, "encoder index:%d", encoder_index); + return encoder_index; +} + static int mtk_dsi_bind(struct device *dev, struct device *master, void *data) { int ret;