diff mbox series

[RFC,2/8] drm/i915: Split PTE encode between Gen12 and Meteorlake

Message ID 20230727145504.1919316-3-tvrtko.ursulin@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Another take on PAT/object cache mode refactoring | expand

Commit Message

Tvrtko Ursulin July 27, 2023, 2:54 p.m. UTC 
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

No need to run extra instructions which will never trigger on platforms
before Meteorlake.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Comments

Matt Roper July 27, 2023, 10:25 p.m. UTC | #1 
On Thu, Jul 27, 2023 at 03:54:58PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> No need to run extra instructions which will never trigger on platforms
> before Meteorlake.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> index c8568e5d1147..862ac1d2de25 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> @@ -63,6 +63,30 @@ static u64 gen12_pte_encode(dma_addr_t addr,
>  {
>  	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
>  
> +	if (unlikely(flags & PTE_READ_ONLY))
> +		pte &= ~GEN8_PAGE_RW;
> +
> +	if (flags & PTE_LM)
> +		pte |= GEN12_PPGTT_PTE_LM;
> +
> +	if (pat_index & BIT(0))
> +		pte |= GEN12_PPGTT_PTE_PAT0;
> +
> +	if (pat_index & BIT(1))
> +		pte |= GEN12_PPGTT_PTE_PAT1;
> +
> +	if (pat_index & BIT(2))
> +		pte |= GEN12_PPGTT_PTE_PAT2;
> +
> +	return pte;
> +}
> +
> +static u64 mtl_pte_encode(dma_addr_t addr,
> +			  unsigned int pat_index,
> +			  u32 flags)
> +{
> +	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
> +

Would it be more readable to start with

        gen8_pte_t pte = gen12_pte_encode(addr, pat_index, flags);

and then |-in only the MTL-specific bit(s) as appropriate?

>  	if (unlikely(flags & PTE_READ_ONLY))
>  		pte &= ~GEN8_PAGE_RW;
>  
> @@ -995,6 +1019,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
>  	 */
>  	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
>  
> +	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
> +		ppgtt->vm.pte_encode = mtl_pte_encode;
>  	if (GRAPHICS_VER(gt->i915) >= 12)
>  		ppgtt->vm.pte_encode = gen12_pte_encode;

I think you wanted 'else if' here.  Otherwise you clobber the MTL
function pointer.


Matt

>  	else
> -- 
> 2.39.2
>
Tvrtko Ursulin July 28, 2023, 8:18 a.m. UTC | #2 
On 27/07/2023 23:25, Matt Roper wrote:
> On Thu, Jul 27, 2023 at 03:54:58PM +0100, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> No need to run extra instructions which will never trigger on platforms
>> before Meteorlake.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 ++++++++++++++++++++++++++
>>   1 file changed, 26 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> index c8568e5d1147..862ac1d2de25 100644
>> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> @@ -63,6 +63,30 @@ static u64 gen12_pte_encode(dma_addr_t addr,
>>   {
>>   	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
>>   
>> +	if (unlikely(flags & PTE_READ_ONLY))
>> +		pte &= ~GEN8_PAGE_RW;
>> +
>> +	if (flags & PTE_LM)
>> +		pte |= GEN12_PPGTT_PTE_LM;
>> +
>> +	if (pat_index & BIT(0))
>> +		pte |= GEN12_PPGTT_PTE_PAT0;
>> +
>> +	if (pat_index & BIT(1))
>> +		pte |= GEN12_PPGTT_PTE_PAT1;
>> +
>> +	if (pat_index & BIT(2))
>> +		pte |= GEN12_PPGTT_PTE_PAT2;
>> +
>> +	return pte;
>> +}
>> +
>> +static u64 mtl_pte_encode(dma_addr_t addr,
>> +			  unsigned int pat_index,
>> +			  u32 flags)
>> +{
>> +	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
>> +
> 
> Would it be more readable to start with
> 
>          gen8_pte_t pte = gen12_pte_encode(addr, pat_index, flags);
> 
> and then |-in only the MTL-specific bit(s) as appropriate?
> 
>>   	if (unlikely(flags & PTE_READ_ONLY))
>>   		pte &= ~GEN8_PAGE_RW;
>>   
>> @@ -995,6 +1019,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
>>   	 */
>>   	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
>>   
>> +	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
>> +		ppgtt->vm.pte_encode = mtl_pte_encode;
>>   	if (GRAPHICS_VER(gt->i915) >= 12)
>>   		ppgtt->vm.pte_encode = gen12_pte_encode;
> 
> I think you wanted 'else if' here.  Otherwise you clobber the MTL
> function pointer.

Doh this was a strong fail.. Yes and yes.. I even had it like you 
suggest in that patch I mentioned to you earlier.. 
https://patchwork.freedesktop.org/patch/546013/?series=120341&rev=2.

Do you have an opinion on that one perhaps?

Thanks,

Tvrtko
Matt Roper July 28, 2023, 2:41 p.m. UTC | #3 
On Fri, Jul 28, 2023 at 09:18:36AM +0100, Tvrtko Ursulin wrote:
> 
> On 27/07/2023 23:25, Matt Roper wrote:
> > On Thu, Jul 27, 2023 at 03:54:58PM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > > 
> > > No need to run extra instructions which will never trigger on platforms
> > > before Meteorlake.
> > > 
> > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 ++++++++++++++++++++++++++
> > >   1 file changed, 26 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> > > index c8568e5d1147..862ac1d2de25 100644
> > > --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> > > +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> > > @@ -63,6 +63,30 @@ static u64 gen12_pte_encode(dma_addr_t addr,
> > >   {
> > >   	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
> > > +	if (unlikely(flags & PTE_READ_ONLY))
> > > +		pte &= ~GEN8_PAGE_RW;
> > > +
> > > +	if (flags & PTE_LM)
> > > +		pte |= GEN12_PPGTT_PTE_LM;
> > > +
> > > +	if (pat_index & BIT(0))
> > > +		pte |= GEN12_PPGTT_PTE_PAT0;
> > > +
> > > +	if (pat_index & BIT(1))
> > > +		pte |= GEN12_PPGTT_PTE_PAT1;
> > > +
> > > +	if (pat_index & BIT(2))
> > > +		pte |= GEN12_PPGTT_PTE_PAT2;
> > > +
> > > +	return pte;
> > > +}
> > > +
> > > +static u64 mtl_pte_encode(dma_addr_t addr,
> > > +			  unsigned int pat_index,
> > > +			  u32 flags)
> > > +{
> > > +	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
> > > +
> > 
> > Would it be more readable to start with
> > 
> >          gen8_pte_t pte = gen12_pte_encode(addr, pat_index, flags);
> > 
> > and then |-in only the MTL-specific bit(s) as appropriate?
> > 
> > >   	if (unlikely(flags & PTE_READ_ONLY))
> > >   		pte &= ~GEN8_PAGE_RW;
> > > @@ -995,6 +1019,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
> > >   	 */
> > >   	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
> > > +	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
> > > +		ppgtt->vm.pte_encode = mtl_pte_encode;
> > >   	if (GRAPHICS_VER(gt->i915) >= 12)
> > >   		ppgtt->vm.pte_encode = gen12_pte_encode;
> > 
> > I think you wanted 'else if' here.  Otherwise you clobber the MTL
> > function pointer.
> 
> Doh this was a strong fail.. Yes and yes.. I even had it like you suggest in
> that patch I mentioned to you earlier..
> https://patchwork.freedesktop.org/patch/546013/?series=120341&rev=2.
> 
> Do you have an opinion on that one perhaps?

Yeah, I overlooked that patch before, but it looks good to me.


Matt


> 
> Thanks,
> 
> Tvrtko
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index c8568e5d1147..862ac1d2de25 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -63,6 +63,30 @@  static u64 gen12_pte_encode(dma_addr_t addr,
 {
 	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
 
+	if (unlikely(flags & PTE_READ_ONLY))
+		pte &= ~GEN8_PAGE_RW;
+
+	if (flags & PTE_LM)
+		pte |= GEN12_PPGTT_PTE_LM;
+
+	if (pat_index & BIT(0))
+		pte |= GEN12_PPGTT_PTE_PAT0;
+
+	if (pat_index & BIT(1))
+		pte |= GEN12_PPGTT_PTE_PAT1;
+
+	if (pat_index & BIT(2))
+		pte |= GEN12_PPGTT_PTE_PAT2;
+
+	return pte;
+}
+
+static u64 mtl_pte_encode(dma_addr_t addr,
+			  unsigned int pat_index,
+			  u32 flags)
+{
+	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
+
 	if (unlikely(flags & PTE_READ_ONLY))
 		pte &= ~GEN8_PAGE_RW;
 
@@ -995,6 +1019,8 @@  struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
 	 */
 	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
 
+	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
+		ppgtt->vm.pte_encode = mtl_pte_encode;
 	if (GRAPHICS_VER(gt->i915) >= 12)
 		ppgtt->vm.pte_encode = gen12_pte_encode;
 	else