[v2,1/4] drm/amdgpu: Add separate mode for syncing DMA_RESV_USAGE_BOOKKEEP.

Message ID	20230821062005.109771-2-ishitatsuyuki@gmail.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <dri-devel-bounces@lists.freedesktop.org> From: Tatsuyuki Ishi <ishitatsuyuki@gmail.com> To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH v2 1/4] drm/amdgpu: Add separate mode for syncing DMA_RESV_USAGE_BOOKKEEP. Date: Mon, 21 Aug 2023 15:20:02 +0900 Message-ID: <20230821062005.109771-2-ishitatsuyuki@gmail.com> In-Reply-To: <20230821062005.109771-1-ishitatsuyuki@gmail.com> References: <20230821062005.109771-1-ishitatsuyuki@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Cc: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>, christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" <dri-devel-bounces@lists.freedesktop.org>
Series	amdgpu: Allow explicitly synchronized submissions. \| expand [v2,0/4] amdgpu: Allow explicitly synchronized submissions. [v2,1/4] drm/amdgpu: Add separate mode for syncing DMA_RESV_USAGE_BOOKKEEP. [v2,2/4] drm/amdgpu: Allow explicit sync for VM ops. [v2,3/4] drm/amdgpu: Add option to disable implicit sync for a context. [v2,4/4] drm/amdgpu: Bump amdgpu driver version.

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c index edb35a88cb78..240556838094 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c @@ -1287,7 +1287,7 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info, struct amdgpu_bo *pd = peer_vm->root.bo; ret = amdgpu_sync_resv(NULL, sync, pd->tbo.base.resv, - AMDGPU_SYNC_NE_OWNER, + AMDGPU_SYNC_NE_OWNER, AMDGPU_SYNC_NE_OWNER, AMDGPU_FENCE_OWNER_KFD); if (ret) return ret; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 977e1804718d..2cb814de0149 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1203,7 +1203,7 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p) sync_mode = amdgpu_bo_explicit_sync(bo) ? AMDGPU_SYNC_EXPLICIT : AMDGPU_SYNC_NE_OWNER; r = amdgpu_sync_resv(p->adev, &p->sync, resv, sync_mode, - &fpriv->vm); + AMDGPU_SYNC_EXPLICIT, &fpriv->vm); if (r) return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index f7905bce0de1..f20c1d2757e4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1450,7 +1450,8 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, * * @adev: amdgpu device pointer * @resv: reservation object to sync to - * @sync_mode: synchronization mode + * @implicit_sync_mode: synchronization mode for usage <= DMA_RESV_USAGE_READ + * @explicit_sync_mode: synchronization mode for usage DMA_RESV_USAGE_BOOKKEEP * @owner: fence owner * @intr: Whether the wait is interruptible * @@ -1460,14 +1461,15 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, * 0 on success, errno otherwise. */ int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv, - enum amdgpu_sync_mode sync_mode, void *owner, + enum amdgpu_sync_mode implicit_sync_mode, + enum amdgpu_sync_mode explicit_sync_mode, void *owner, bool intr) { struct amdgpu_sync sync; int r; amdgpu_sync_create(&sync); - amdgpu_sync_resv(adev, &sync, resv, sync_mode, owner); + amdgpu_sync_resv(adev, &sync, resv, implicit_sync_mode, explicit_sync_mode, owner); r = amdgpu_sync_wait(&sync, intr); amdgpu_sync_free(&sync); return r; @@ -1488,7 +1490,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr) struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); return amdgpu_bo_sync_wait_resv(adev, bo->tbo.base.resv, - AMDGPU_SYNC_NE_OWNER, owner, intr); + AMDGPU_SYNC_NE_OWNER, AMDGPU_SYNC_EXPLICIT, + owner, intr); } /** diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index 05496b97ef93..e982b5815969 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -350,7 +350,8 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo); void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, bool shared); int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv, - enum amdgpu_sync_mode sync_mode, void *owner, + enum amdgpu_sync_mode implicit_sync_mode, + enum amdgpu_sync_mode explicit_sync_mode, void *owner, bool intr); int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c index dcd8c066bc1f..e94f90d87902 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c @@ -226,14 +226,15 @@ static bool amdgpu_sync_test_fence(struct amdgpu_device *adev, * @adev: amdgpu device * @sync: sync object to add fences from reservation object to * @resv: reservation object with embedded fence - * @mode: how owner affects which fences we sync to + * @implicit_mode: how owner affects which fences with usage <= DMA_RESV_USAGE_READ we sync to + * @explicit_mode: how owner affects which fences with usage DMA_RESV_USAGE_BOOKKEEP we sync to * @owner: owner of the planned job submission * * Sync to the fence */ int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, - struct dma_resv *resv, enum amdgpu_sync_mode mode, - void *owner) + struct dma_resv *resv, enum amdgpu_sync_mode implicit_mode, + enum amdgpu_sync_mode explicit_mode, void *owner) { struct dma_resv_iter cursor; struct dma_fence *f; @@ -246,6 +247,10 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, f) { dma_fence_chain_for_each(f, f) { struct dma_fence *tmp = dma_fence_chain_contained(f); + enum amdgpu_sync_mode mode = implicit_mode; + + if (dma_resv_iter_usage(&cursor) >= DMA_RESV_USAGE_BOOKKEEP) + mode = explicit_mode; if (amdgpu_sync_test_fence(adev, mode, owner, tmp)) { r = amdgpu_sync_fence(sync, f); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h index cf1e9e858efd..7758105a1d6c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h @@ -49,8 +49,8 @@ struct amdgpu_sync { void amdgpu_sync_create(struct amdgpu_sync *sync); int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f); int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, - struct dma_resv *resv, enum amdgpu_sync_mode mode, - void *owner); + struct dma_resv *resv, enum amdgpu_sync_mode implicit_mode, + enum amdgpu_sync_mode explicit_mode, void *owner); struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, struct amdgpu_ring *ring); struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c index 31913ae86de6..f10332e1c6c0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c @@ -51,7 +51,7 @@ static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p, if (!resv) return 0; - return amdgpu_bo_sync_wait_resv(p->adev, resv, sync_mode, p->vm, true); + return amdgpu_bo_sync_wait_resv(p->adev, resv, sync_mode, sync_mode, p->vm, true); } /** diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c index 349416e176a1..e259a51e7c56 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c @@ -98,7 +98,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p, return 0; amdgpu_sync_create(&sync); - r = amdgpu_sync_resv(p->adev, &sync, resv, sync_mode, p->vm); + r = amdgpu_sync_resv(p->adev, &sync, resv, sync_mode, sync_mode, p->vm); if (!r) r = amdgpu_sync_push_to_job(&sync, p->job); amdgpu_sync_free(&sync);

[v2,1/4] drm/amdgpu: Add separate mode for syncing DMA_RESV_USAGE_BOOKKEEP.

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Patch