| Message ID | 20230915104849.187146-4-manikandan.m@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for XLCDC to sam9x7 SoC family. | expand |
On 15.09.2023 13:48, Manikandan Muralidharan wrote: > Add the LCD controller layer definition and descriptor structure for > sam9x75 for the following layers, s/,/: > - Base Layer > - Overlay1 Layer > - Overlay2 Layer > - High End Overlay > > Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> > --- > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97 ++++++++++++++++++++ > 1 file changed, 97 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > index fa0f9a93d50d..d30aec174aa2 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > @@ -462,6 +462,99 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sam9x60 = { > .layers = atmel_hlcdc_sam9x60_layers, > }; > > +static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sam9x75_layers[] = { > + { > + .name = "base", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x60, > + .id = 0, > + .type = ATMEL_HLCDC_BASE_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .xstride = { 2 }, > + .default_color = 3, > + .general_config = 4, > + .disc_pos = 5, > + .disc_size = 6, > + }, > + .clut_offset = 0x700, > + }, > + { > + .name = "overlay1", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x160, > + .id = 1, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .pos = 2, > + .size = 3, > + .xstride = { 4 }, > + .pstride = { 5 }, > + .default_color = 6, > + .chroma_key = 7, > + .chroma_key_mask = 8, > + .general_config = 9, > + }, > + .clut_offset = 0xb00, > + }, > + { > + .name = "overlay2", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x260, > + .id = 2, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .pos = 2, > + .size = 3, > + .xstride = { 4 }, > + .pstride = { 5 }, > + .default_color = 6, > + .chroma_key = 7, > + .chroma_key_mask = 8, > + .general_config = 9, > + }, > + .clut_offset = 0xf00, > + }, > + { > + .name = "high-end-overlay", > + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats, > + .regs_offset = 0x360, > + .id = 3, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x30, > + .layout = { > + .pos = 2, > + .size = 3, > + .memsize = 4, > + .xstride = { 5, 7 }, > + .pstride = { 6, 8 }, > + .default_color = 9, > + .chroma_key = 10, > + .chroma_key_mask = 11, > + .general_config = 12, > + .csc = 16, > + .scaler_config = 23, > + }, > + .clut_offset = 0x1300, > + }, > +}; > + > +static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sam9x75 = { > + .min_width = 0, > + .min_height = 0, > + .max_width = 2048, > + .max_height = 2048, > + .max_spw = 0xff, > + .max_vpw = 0xff, > + .max_hpw = 0x3ff, > + .fixed_clksrc = true, > + .is_xlcdc = true, > + .nlayers = ARRAY_SIZE(atmel_xlcdc_sam9x75_layers), > + .layers = atmel_xlcdc_sam9x75_layers, > +}; > + > static const struct of_device_id atmel_hlcdc_of_match[] = { > { > .compatible = "atmel,at91sam9n12-hlcdc", > @@ -487,6 +580,10 @@ static const struct of_device_id atmel_hlcdc_of_match[] = { > .compatible = "microchip,sam9x60-hlcdc", > .data = &atmel_hlcdc_dc_sam9x60, > }, > + { > + .compatible = "microchip,sam9x75-xlcdc", > + .data = &atmel_xlcdc_dc_sam9x75, > + }, > { /* sentinel */ }, > }; > MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index fa0f9a93d50d..d30aec174aa2 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -462,6 +462,99 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sam9x60 = { .layers = atmel_hlcdc_sam9x60_layers, }; +static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sam9x75_layers[] = { + { + .name = "base", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x60, + .id = 0, + .type = ATMEL_HLCDC_BASE_LAYER, + .cfgs_offset = 0x1c, + .layout = { + .xstride = { 2 }, + .default_color = 3, + .general_config = 4, + .disc_pos = 5, + .disc_size = 6, + }, + .clut_offset = 0x700, + }, + { + .name = "overlay1", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x160, + .id = 1, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x1c, + .layout = { + .pos = 2, + .size = 3, + .xstride = { 4 }, + .pstride = { 5 }, + .default_color = 6, + .chroma_key = 7, + .chroma_key_mask = 8, + .general_config = 9, + }, + .clut_offset = 0xb00, + }, + { + .name = "overlay2", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x260, + .id = 2, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x1c, + .layout = { + .pos = 2, + .size = 3, + .xstride = { 4 }, + .pstride = { 5 }, + .default_color = 6, + .chroma_key = 7, + .chroma_key_mask = 8, + .general_config = 9, + }, + .clut_offset = 0xf00, + }, + { + .name = "high-end-overlay", + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats, + .regs_offset = 0x360, + .id = 3, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x30, + .layout = { + .pos = 2, + .size = 3, + .memsize = 4, + .xstride = { 5, 7 }, + .pstride = { 6, 8 }, + .default_color = 9, + .chroma_key = 10, + .chroma_key_mask = 11, + .general_config = 12, + .csc = 16, + .scaler_config = 23, + }, + .clut_offset = 0x1300, + }, +}; + +static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sam9x75 = { + .min_width = 0, + .min_height = 0, + .max_width = 2048, + .max_height = 2048, + .max_spw = 0xff, + .max_vpw = 0xff, + .max_hpw = 0x3ff, + .fixed_clksrc = true, + .is_xlcdc = true, + .nlayers = ARRAY_SIZE(atmel_xlcdc_sam9x75_layers), + .layers = atmel_xlcdc_sam9x75_layers, +}; + static const struct of_device_id atmel_hlcdc_of_match[] = { { .compatible = "atmel,at91sam9n12-hlcdc", @@ -487,6 +580,10 @@ static const struct of_device_id atmel_hlcdc_of_match[] = { .compatible = "microchip,sam9x60-hlcdc", .data = &atmel_hlcdc_dc_sam9x60, }, + { + .compatible = "microchip,sam9x75-xlcdc", + .data = &atmel_xlcdc_dc_sam9x75, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
Add the LCD controller layer definition and descriptor structure for sam9x75 for the following layers, - Base Layer - Overlay1 Layer - Overlay2 Layer - High End Overlay Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97 ++++++++++++++++++++ 1 file changed, 97 insertions(+)