From patchwork Mon Sep 18 09:13:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oded Gabbay X-Patchwork-Id: 13389267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A097C46CA1 for ; Mon, 18 Sep 2023 09:13:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 518C310E231; Mon, 18 Sep 2023 09:13:34 +0000 (UTC) Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id F40D410E22E for ; Mon, 18 Sep 2023 09:13:31 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 76E76CE0A0B; Mon, 18 Sep 2023 09:13:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D5475C433C8; Mon, 18 Sep 2023 09:13:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695028407; bh=4/VVM9XorWdiX2PYPKT9KPOPQ6XGUkwmOlEV21QKXRE=; h=From:To:Cc:Subject:Date:From; b=HrhjxHXVAnfudU7iLw3Pb7N1bKFtSBxEH91cS8gs54t7qYGMGrEr/kbElzMHQcOsH K5pFoaBsxF2jJX7SedvmjUL+1i28zewOgbCnUAt0qlYsOcyvX3tiaAhlHqVPHwx3QD hLtDlZGd3oizheUpHl9NNYAkEWVyGvt8BYaXDZyrx43GjxqtHZcoy9ge9gThbeZkzn xbVvPL8Q+EcuixZnOd0ptUE4sYKFwM4NwZvjNB32SN1Tf9iBVzxl/TEUhnauFkfBID PCCASGzDZ2GdwtE3LsA27cjfUPjKD28Ig9kpPAefNCtrUrfviBjnWc5w7P8tG348Gy rDQs6T4mdmXXA== From: Oded Gabbay To: dri-devel@lists.freedesktop.org Subject: [PATCH 01/14] accel/habanalabs: improve etf configuration Date: Mon, 18 Sep 2023 12:13:08 +0300 Message-Id: <20230918091321.855943-1-ogabbay@kernel.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Dotan Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Benjamin Dotan coresight ETF blocks have different size. As a result, sync packets need to be aligned based on fifo size. Signed-off-by: Benjamin Dotan Reviewed-by: Oded Gabbay Signed-off-by: Oded Gabbay --- drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c b/drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c index 32e0f1a85b35..14a855cdc96b 100644 --- a/drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c +++ b/drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c @@ -2125,10 +2125,17 @@ static int gaudi2_config_etf(struct hl_device *hdev, struct hl_debug_params *par if (!input) return -EINVAL; + val = RREG32(base_reg + mmETF_RSZ_OFFSET) << 2; + if (val) { + val = ffs(val); + WREG32(base_reg + mmETF_PSCR_OFFSET, val); + } else { + WREG32(base_reg + mmETF_PSCR_OFFSET, 0x10); + } + WREG32(base_reg + mmETF_BUFWM_OFFSET, 0x3FFC); WREG32(base_reg + mmETF_MODE_OFFSET, input->sink_mode); WREG32(base_reg + mmETF_FFCR_OFFSET, 0x4001); - WREG32(base_reg + mmETF_PSCR_OFFSET, 0x10); WREG32(base_reg + mmETF_CTL_OFFSET, 1); } else { WREG32(base_reg + mmETF_BUFWM_OFFSET, 0);