diff mbox series

[v3,4/8] drm: lcdif: control display clock from CRTC enable/disable

Message ID 20230928113629.103188-4-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series [v3,1/8] drm: lcdif: improve burst size configuration comment | expand

Commit Message

Lucas Stach Sept. 28, 2023, 11:36 a.m. UTC
The display clock only required to be running when the CRTC
is enabled, so we have well defined points in the DRM atomic
sequence when this clock should be enabled or disabled.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
v3: new patch
---
 drivers/gpu/drm/mxsfb/lcdif_drv.c | 4 ----
 drivers/gpu/drm/mxsfb/lcdif_kms.c | 5 +++++
 2 files changed, 5 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/mxsfb/lcdif_drv.c b/drivers/gpu/drm/mxsfb/lcdif_drv.c
index 18de2f17e249..38dfd307adc1 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_drv.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_drv.c
@@ -306,8 +306,6 @@  static int __maybe_unused lcdif_rpm_suspend(struct device *dev)
 	struct drm_device *drm = dev_get_drvdata(dev);
 	struct lcdif_drm_private *lcdif = drm->dev_private;
 
-	/* These clock supply the DISPLAY CLOCK Domain */
-	clk_disable_unprepare(lcdif->clk);
 	/* These clock supply the System Bus, AXI, Write Path, LFIFO */
 	clk_disable_unprepare(lcdif->clk_disp_axi);
 	/* These clock supply the Control Bus, APB, APBH Ctrl Registers */
@@ -325,8 +323,6 @@  static int __maybe_unused lcdif_rpm_resume(struct device *dev)
 	clk_prepare_enable(lcdif->clk_axi);
 	/* These clock supply the System Bus, AXI, Write Path, LFIFO */
 	clk_prepare_enable(lcdif->clk_disp_axi);
-	/* These clock supply the DISPLAY CLOCK Domain */
-	clk_prepare_enable(lcdif->clk);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index 6a292f4b332b..d43e3633bce0 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
@@ -545,6 +545,9 @@  static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc,
 		writel(CTRLDESCL_HIGH0_4_ADDR_HIGH(upper_32_bits(paddr)),
 		       lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);
 	}
+
+	clk_prepare_enable(lcdif->clk);
+
 	lcdif_enable_controller(lcdif);
 
 	drm_crtc_vblank_on(crtc);
@@ -561,6 +564,8 @@  static void lcdif_crtc_atomic_disable(struct drm_crtc *crtc,
 
 	lcdif_disable_controller(lcdif);
 
+	clk_disable_unprepare(lcdif->clk);
+
 	spin_lock_irq(&drm->event_lock);
 	event = crtc->state->event;
 	if (event) {