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Mon, 30 Oct 2023 03:36:51 -0700 (PDT) From: Neil Armstrong Date: Mon, 30 Oct 2023 11:36:29 +0100 Subject: [PATCH v2 7/8] drm/msm: dsi: add support for DSI-PHY on SM8650 MIME-Version: 1.0 Message-Id: <20231030-topic-sm8650-upstream-mdss-v2-7-43f1887c82b8@linaro.org> References: <20231030-topic-sm8650-upstream-mdss-v2-0-43f1887c82b8@linaro.org> In-Reply-To: <20231030-topic-sm8650-upstream-mdss-v2-0-43f1887c82b8@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Marek , Krishna Manikandan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3055; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=PmGwbQW3PICKIZTxI02L37m8WsgoZLD8E/kiS6Mxoy4=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlP4c4d/Lu8Kn0hOMfxlhcIgt6778dU9GL/rNxcM72 rMPjhqmJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZT+HOAAKCRB33NvayMhJ0StWD/ 9Jt+oRdXMdvvQMyXJ0weDupdyGKzSCqNWtqaTYJxpre6WCTIEbfD8YOWRpuqne63xM0WwRsR6pM8jt y+hLDD/HSzZk39Ge4gEtBV6SRhTZxDfcP0eFf+3aGByOLZYd3iMLlbL8eeWmKL4ZIbCaIS3tEvU1sG yJNvDr2o0MpjYeK4Q+ALQH0sgttfPcKjzLJcye8Mk//hReMyZWC4cfa1mT6owTImG8vsvAmAsU4GSR z7lHVHETTnuhUKNvlSDdgzzp7t8dMrrhleQZjP/rhW8iOxoCbxCs75Pii5fpeXgvkuyRkxXlCYCGd3 BV26bPlrtPB5NrfCCTlO5a3fkuzMMPRo9U4o0PmRQBcLW4CBt2yDTrb4hBGAcf6Db7DmZmbSFIkdJh ih72Lf3VHeJYe97lKynh3esi+UkmImgfk8or7Z+jMLvoYj0jH1oPUZnVEPATdIGNOpiHs8iaOY3ol7 HKg0M0EU19SEIwyr8y6dG89l/lcw46rFe8Kv9S/9pyzSyHdHrClfupAYpr7JAXvA1NbJYowQ4/01jl 4kaM020DbUKHvT3Up3JL9h2NkZEz3LKvopcSAIlM+o46hTW+20MTOt906CtFT2SP/+0RMAIcAkCuc8 KUpNBBKO/ocAvWF/gME6QnOV7VA1lSGY9y00s36xGA2HcjagKw/PXbTO4Pqw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add DSI PHY support for the SM8650 platform. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++++++++++++++++++++++++++ 3 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c index 05621e5e7d63..7612be6c3618 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -585,6 +585,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { .data = &dsi_phy_5nm_8450_cfgs }, { .compatible = "qcom,sm8550-dsi-phy-4nm", .data = &dsi_phy_4nm_8550_cfgs }, + { .compatible = "qcom,sm8650-dsi-phy-4nm", + .data = &dsi_phy_4nm_8650_cfgs }, #endif {} }; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h index 8b640d174785..e4275d3ad581 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -62,6 +62,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8450_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8550_cfgs; +extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8650_cfgs; struct msm_dsi_dphy_timing { u32 clk_zero; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index 3b1ed02f644d..c66193f2dc0d 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -1121,6 +1121,10 @@ static const struct regulator_bulk_data dsi_phy_7nm_37750uA_regulators[] = { { .supply = "vdds", .init_load_uA = 37550 }, }; +static const struct regulator_bulk_data dsi_phy_7nm_98000uA_regulators[] = { + { .supply = "vdds", .init_load_uA = 98000 }, +}; + static const struct regulator_bulk_data dsi_phy_7nm_97800uA_regulators[] = { { .supply = "vdds", .init_load_uA = 97800 }, }; @@ -1281,3 +1285,26 @@ const struct msm_dsi_phy_cfg dsi_phy_4nm_8550_cfgs = { .num_dsi_phy = 2, .quirks = DSI_PHY_7NM_QUIRK_V5_2, }; + +const struct msm_dsi_phy_cfg dsi_phy_4nm_8650_cfgs = { + .has_phy_lane = true, + .regulator_data = dsi_phy_7nm_98000uA_regulators, + .num_regulators = ARRAY_SIZE(dsi_phy_7nm_98000uA_regulators), + .ops = { + .enable = dsi_7nm_phy_enable, + .disable = dsi_7nm_phy_disable, + .pll_init = dsi_pll_7nm_init, + .save_pll_state = dsi_7nm_pll_save_state, + .restore_pll_state = dsi_7nm_pll_restore_state, + .set_continuous_clock = dsi_7nm_set_continuous_clock, + }, + .min_pll_rate = 600000000UL, +#ifdef CONFIG_64BIT + .max_pll_rate = 5000000000UL, +#else + .max_pll_rate = ULONG_MAX, +#endif + .io_start = { 0xae95000, 0xae97000 }, + .num_dsi_phy = 2, + .quirks = DSI_PHY_7NM_QUIRK_V5_2, +};