diff mbox series

drm/amdgpu: don't put MQDs in VRAM on ARM | ARM64

Message ID 20231031175453.1383422-1-alexander.deucher@amd.com (mailing list archive)
State New, archived
Headers show
Series drm/amdgpu: don't put MQDs in VRAM on ARM | ARM64 | expand

Commit Message

Alex Deucher Oct. 31, 2023, 5:54 p.m. UTC
Issues were reported with commit 1cfb4d612127
("drm/amdgpu: put MQDs in VRAM") on an ADLINK Ampere
Altra Developer Platform (AVA developer platform).

Various ARM systems seem to have problems related
to PCIe and MMIO access.  In this case, I'm not sure
if this is specific to the ADLINK platform or ARM
in general.  Seems to be some coherency issue with
VRAM.  For now, just don't put MQDs in VRAM on ARM.

Link: https://lists.freedesktop.org/archives/amd-gfx/2023-October/100453.html
Fixes: 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: alexey.klimov@linaro.org
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Christian König Nov. 2, 2023, 1:26 p.m. UTC | #1
Am 31.10.23 um 18:54 schrieb Alex Deucher:
> Issues were reported with commit 1cfb4d612127
> ("drm/amdgpu: put MQDs in VRAM") on an ADLINK Ampere
> Altra Developer Platform (AVA developer platform).
>
> Various ARM systems seem to have problems related
> to PCIe and MMIO access.  In this case, I'm not sure
> if this is specific to the ADLINK platform or ARM
> in general.  Seems to be some coherency issue with
> VRAM.  For now, just don't put MQDs in VRAM on ARM.
>
> Link: https://lists.freedesktop.org/archives/amd-gfx/2023-October/100453.html
> Fixes: 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM")
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Cc: alexey.klimov@linaro.org

Acked-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index c92e0aba69e1..a2a29dcb2422 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -385,9 +385,11 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
>   	struct amdgpu_ring *ring = &kiq->ring;
>   	u32 domain = AMDGPU_GEM_DOMAIN_GTT;
>   
> +#if !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
>   	/* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
>   	if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0))
>   		domain |= AMDGPU_GEM_DOMAIN_VRAM;
> +#endif
>   
>   	/* create MQD for KIQ */
>   	if (!adev->enable_mes_kiq && !ring->mqd_obj) {
Alexey Klimov Nov. 7, 2023, 3:35 p.m. UTC | #2
On Tue, 31 Oct 2023 at 17:55, Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Issues were reported with commit 1cfb4d612127
> ("drm/amdgpu: put MQDs in VRAM") on an ADLINK Ampere
> Altra Developer Platform (AVA developer platform).
>
> Various ARM systems seem to have problems related
> to PCIe and MMIO access.  In this case, I'm not sure
> if this is specific to the ADLINK platform or ARM
> in general.  Seems to be some coherency issue with
> VRAM.  For now, just don't put MQDs in VRAM on ARM.
>
> Link: https://lists.freedesktop.org/archives/amd-gfx/2023-October/100453.html
> Fixes: 1cfb4d612127 ("drm/amdgpu: put MQDs in VRAM")
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Cc: alexey.klimov@linaro.org

Thanks for the patch! Can you please give me day or two to test it a
little bit more? I am still trying ti figure out if page faults in GPU
depend on this patch or not. I can provide Tested-by tag then.

Also, FWIW maybe you can add Reported-by tag.

Thanks,
Alexey


> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index c92e0aba69e1..a2a29dcb2422 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -385,9 +385,11 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
>         struct amdgpu_ring *ring = &kiq->ring;
>         u32 domain = AMDGPU_GEM_DOMAIN_GTT;
>
> +#if !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
>         /* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
>         if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0))
>                 domain |= AMDGPU_GEM_DOMAIN_VRAM;
> +#endif
>
>         /* create MQD for KIQ */
>         if (!adev->enable_mes_kiq && !ring->mqd_obj) {
> --
> 2.41.0
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index c92e0aba69e1..a2a29dcb2422 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -385,9 +385,11 @@  int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
 	struct amdgpu_ring *ring = &kiq->ring;
 	u32 domain = AMDGPU_GEM_DOMAIN_GTT;
 
+#if !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
 	/* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
 	if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0))
 		domain |= AMDGPU_GEM_DOMAIN_VRAM;
+#endif
 
 	/* create MQD for KIQ */
 	if (!adev->enable_mes_kiq && !ring->mqd_obj) {