| Message ID | 20231102142643.75288-5-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panfrost: Turn off clocks and regulators in PM | expand |
On 02/11/2023 14:26, AngeloGioacchino Del Regno wrote: > All of the MediaTek SoCs supported by Panfrost can switch the clocks > off and on during system sleep to save some power without any user > experience penalty. > > Measurements taken on multiple MediaTek SoCs show that adding this > will not prolong the time that is required to resume the system in > any meaningful way. > > As an example, for MT8195 - a "before" with only runtime PM operations > (so, without turning on/off GPU clocks), and an "after" executing both > the system sleep .resume() handler and .runtime_resume() (so the time > refers to T_Resume + T_Runtime_Resume): > > Average Panfrost-only system sleep resume time, before: ~28000ns > Average Panfrost-only system sleep resume time, after: ~33500ns > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> The change looks good: Reviewed-by: Steven Price <steven.price@arm.com> However it would be good to explicitly state (in the commit message) which SoCs you personally have tested (for correctness), just in case we find there are problems in the future with this on a particular SoC. Steve > --- > drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c > index 7cabf4e3d1f2..82f3c5fe9c58 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_drv.c > +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c > @@ -734,6 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { > .supply_names = mediatek_mt8183_b_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), > .pm_domain_names = mediatek_mt8183_pm_domains, > + .pm_features = BIT(GPU_PM_CLK_DIS), > }; > > static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; > @@ -742,6 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { > .supply_names = mediatek_mt8183_b_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), > .pm_domain_names = mediatek_mt8186_pm_domains, > + .pm_features = BIT(GPU_PM_CLK_DIS), > }; > > static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; > @@ -752,6 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { > .supply_names = mediatek_mt8192_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), > .pm_domain_names = mediatek_mt8192_pm_domains, > + .pm_features = BIT(GPU_PM_CLK_DIS), > }; > > static const struct of_device_id dt_match[] = {
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 7cabf4e3d1f2..82f3c5fe9c58 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,6 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names = mediatek_mt8183_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; @@ -742,6 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names = mediatek_mt8186_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; @@ -752,6 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { .supply_names = mediatek_mt8192_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names = mediatek_mt8192_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS), }; static const struct of_device_id dt_match[] = {
All of the MediaTek SoCs supported by Panfrost can switch the clocks off and on during system sleep to save some power without any user experience penalty. Measurements taken on multiple MediaTek SoCs show that adding this will not prolong the time that is required to resume the system in any meaningful way. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off GPU clocks), and an "after" executing both the system sleep .resume() handler and .runtime_resume() (so the time refers to T_Resume + T_Runtime_Resume): Average Panfrost-only system sleep resume time, before: ~28000ns Average Panfrost-only system sleep resume time, after: ~33500ns Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +++ 1 file changed, 3 insertions(+)