| Message ID | 20231109102543.42971-7-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panfrost: Turn off clocks and regulators in PM | expand |
On 09/11/2023 10:25, AngeloGioacchino Del Regno wrote: > All of the MediaTek SoCs supported by Panfrost can completely cut power > to the GPU during full system sleep without any user-noticeable delay > in the resume operation, as shown by measurements taken on multiple > MediaTek SoCs (MT8183/86/92/95). > > As an example, for MT8195 - a "before" with only runtime PM operations > (so, without turning on/off regulators), and an "after" executing both > the system sleep .resume() handler and .runtime_resume() (so the time > refers to T_Resume + T_Runtime_Resume): > > Average Panfrost-only system sleep resume time, before: ~33500ns > Average Panfrost-only system sleep resume time, after: ~336200ns > > Keep in mind that this additional ~308200 nanoseconds delay happens only > in resume from a full system suspend, and not in runtime PM operations, > hence it is acceptable. > > Measurements were also taken on MT8186, showing a delay of ~312000 ns. > > Testing of this happened on all of the aforementioned MediaTek SoCs, but: > MT8183 got tested only by KernelCI with <=10 suspend/resume cycles > MT8186, MT8192, MT8195 were tested manually with over 100 suspend/resume > cycles with GNOME DE (Mutter + Wayland). > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> > --- > drivers/gpu/drm/panfrost/panfrost_drv.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c > index 82f3c5fe9c58..f63382d9ab04 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_drv.c > +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c > @@ -734,7 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { > .supply_names = mediatek_mt8183_b_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), > .pm_domain_names = mediatek_mt8183_pm_domains, > - .pm_features = BIT(GPU_PM_CLK_DIS), > + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), > }; > > static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; > @@ -743,7 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { > .supply_names = mediatek_mt8183_b_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), > .pm_domain_names = mediatek_mt8186_pm_domains, > - .pm_features = BIT(GPU_PM_CLK_DIS), > + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), > }; > > static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; > @@ -754,7 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { > .supply_names = mediatek_mt8192_supplies, > .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), > .pm_domain_names = mediatek_mt8192_pm_domains, > - .pm_features = BIT(GPU_PM_CLK_DIS), > + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), > }; > > static const struct of_device_id dt_match[] = {
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 82f3c5fe9c58..f63382d9ab04 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,7 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183_b_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names = mediatek_mt8183_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; @@ -743,7 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186_data = { .supply_names = mediatek_mt8183_b_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names = mediatek_mt8186_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; @@ -754,7 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { .supply_names = mediatek_mt8192_supplies, .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names = mediatek_mt8192_pm_domains, - .pm_features = BIT(GPU_PM_CLK_DIS), + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; static const struct of_device_id dt_match[] = {
All of the MediaTek SoCs supported by Panfrost can completely cut power to the GPU during full system sleep without any user-noticeable delay in the resume operation, as shown by measurements taken on multiple MediaTek SoCs (MT8183/86/92/95). As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off regulators), and an "after" executing both the system sleep .resume() handler and .runtime_resume() (so the time refers to T_Resume + T_Runtime_Resume): Average Panfrost-only system sleep resume time, before: ~33500ns Average Panfrost-only system sleep resume time, after: ~336200ns Keep in mind that this additional ~308200 nanoseconds delay happens only in resume from a full system suspend, and not in runtime PM operations, hence it is acceptable. Measurements were also taken on MT8186, showing a delay of ~312000 ns. Testing of this happened on all of the aforementioned MediaTek SoCs, but: MT8183 got tested only by KernelCI with <=10 suspend/resume cycles MT8186, MT8192, MT8195 were tested manually with over 100 suspend/resume cycles with GNOME DE (Mutter + Wayland). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)