From patchwork Thu Dec 7 08:00:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 13482859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFDCAC10DC3 for ; Thu, 7 Dec 2023 08:01:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 583E710E7FE; Thu, 7 Dec 2023 08:01:26 +0000 (UTC) Received: from m15.mail.163.com (m15.mail.163.com [45.254.50.220]) by gabe.freedesktop.org (Postfix) with ESMTP id 6AD3710E7FE for ; Thu, 7 Dec 2023 08:01:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=c7kjH jIQ4/nlmiPUxBorZmmivgfaJAOI5Gw9Jj5OowE=; b=OKq28FKFyYa6b2htLqGNk 7n0gxfW6w4Ry12uVjON3FpSilpH14JBP3fdiTWFYnHcexD/F51X/S85Cmm/nzXnn pBXP1x4uqZ/Yps9Q/ryfaNJKiws5IClqDgOZJXYhOHvPqkNEyQzG0PtGYW+L3vLV qwW5eY00Ifora/G/WGoNX8= Received: from ProDesk.. (unknown [58.22.7.114]) by zwqz-smtp-mta-g2-2 (Coremail) with SMTP id _____wD3f3ORe3FlNJyiAg--.51521S2; Thu, 07 Dec 2023 16:00:20 +0800 (CST) From: Andy Yan To: heiko@sntech.de Subject: [PATCH v4 04/17] drm/rockchip: vop2: clear afbc en and transform bit for cluster window at linear mode Date: Thu, 7 Dec 2023 16:00:16 +0800 Message-Id: <20231207080016.652051-1-andyshrk@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231207075906.651771-1-andyshrk@163.com> References: <20231207075906.651771-1-andyshrk@163.com> MIME-Version: 1.0 X-CM-TRANSID: _____wD3f3ORe3FlNJyiAg--.51521S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7ZrW3WF1DuFyrWryfXrWkZwb_yoW8Gr1kpr W5AFWqqr4xK3yqqa1DJF9xZFZYk3ZFkayxWrZ7JwnFgFWUKa4kG3Z0kryDJrWUJ3WagF48 trn3JrW7ZFWYvr7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jSwZ7UUUUU= X-Originating-IP: [58.22.7.114] X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBEhg-XmVOA0WxpgAAsR X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sascha Hauer , chris.obbard@collabora.com, hjc@rock-chips.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, Andy Yan , sebastian.reichel@collabora.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Andy Yan The enable bit and transform offset of cluster windows should be cleared when it work at linear mode, or we may have a iommu fault issue on rk3588 which cluster windows switch between afbc and linear mode. As the cluster windows of rk3568 only supports afbc format so is therefore not affected. Signed-off-by: Andy Yan Reviewed-by: Sascha Hauer --- (no changes since v1) drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 639dfebc6bd1..a019cc9bbd54 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1312,6 +1312,11 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_270, rotate_270); vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_90, rotate_90); } else { + if (vop2_cluster_window(win)) { + vop2_win_write(win, VOP2_WIN_AFBC_ENABLE, 0); + vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, 0); + } + vop2_win_write(win, VOP2_WIN_YRGB_VIR, DIV_ROUND_UP(fb->pitches[0], 4)); }