From patchwork Tue Jan 16 11:37:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 13520734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEC0FC4706C for ; Tue, 16 Jan 2024 11:46:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8F5010E4A8; Tue, 16 Jan 2024 11:46:27 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by gabe.freedesktop.org (Postfix) with ESMTPS id A6CD710E4A8 for ; Tue, 16 Jan 2024 11:46:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1705405587; x=1736941587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RIiWVzj7Ca/iNWN17fr7ywzCMG3qG3fY2kNHZejfSLI=; b=wF0j34uJY6LPFovGEQSxzVghlSX4LT5TAYQZmRui+4wwA+QZmrPg+ZYH YIYJSPhWciHUUUVlNH9lf/P663Fy0ybDsS8mmK1VE4KQUoVrTNlx7LMxO E4Pqo76J7zSz96DLYYdQ66O5jWingwaWB8UmiGaKHiFKUzVc4wu735PmW LfAx8t2omnv5cUMYlbAMdNmltF3Rr8wUbzTS9SNyF7tSY6gUxLxkFjtQe SICLdKrNXOYTegK0nltSwhbQsB6xHFO/tUF77piHrICpnUuaP0GsgA0KB Y+k3tdHatdE5wNp5a8/N9F3xe72kpxJRCctZFcENzBokPoxXkV10nEJi/ Q==; X-CSE-ConnectionGUID: m9+TCx76QtaEOtm0pEMV+w== X-CSE-MsgGUID: GYTwxfHPTs+QFwvuoeMh7A== X-IronPort-AV: E=Sophos;i="6.05,199,1701154800"; d="scan'208";a="245533631" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 16 Jan 2024 04:39:21 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 16 Jan 2024 04:38:51 -0700 Received: from che-lt-i70843lx.amer.actel.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 16 Jan 2024 04:38:40 -0700 From: Dharma Balasubiramani To: , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v2 2/3] dt-bindings: atmel, hlcdc: convert pwm bindings to json-schema Date: Tue, 16 Jan 2024 17:07:59 +0530 Message-ID: <20240116113800.82529-3-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240116113800.82529-1-dharma.b@microchip.com> References: <20240116113800.82529-1-dharma.b@microchip.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux4microchip@microchip.com, Dharma Balasubiramani Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Convert device tree bindings for Atmel's HLCDC PWM controller to YAML format. Signed-off-by: Dharma Balasubiramani Reviewed-by: Conor Dooley --- changelog v1 -> v2 - Remove the explicit copyrights. - Modify title (not include words like binding/driver). - Modify description actually describing the hardware and not the driver. - Remove pinctrl properties which aren't required. - Drop parent node and it's other sub-device node which are not related here. --- .../bindings/pwm/atmel,hlcdc-pwm.yaml | 47 +++++++++++++++++++ .../bindings/pwm/atmel-hlcdc-pwm.txt | 29 ------------ 2 files changed, 47 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml delete mode 100644 Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt diff --git a/Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml b/Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml new file mode 100644 index 000000000000..751122309fa9 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/atmel,hlcdc-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel's HLCDC's PWM controller + +maintainers: + - Nicolas Ferre + - Alexandre Belloni + - Claudiu Beznea + +description: | + The LCDC integrates a Pulse Width Modulation (PWM) Controller. This block + generates the LCD contrast control signal (LCD_PWM) that controls the + display's contrast by software. LCDC_PWM is an 8-bit PWM signal that can be + converted to an analog voltage with a simple passive filter. LCD display + panels have different backlight specifications in terms of minimum/maximum + values for PWM frequency. If the LCDC PWM frequency range does not match the + LCD display panel, it is possible to use the standalone PWM Controller to + drive the backlight. + +properties: + compatible: + const: atmel,hlcdc-pwm + + "#pwm-cells": + const: 3 + description: | + This PWM chip uses the default 3 cells bindings defined in pwm.yaml in + this directory. + +required: + - compatible + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + pwm: pwm { + compatible = "atmel,hlcdc-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_pwm>; + #pwm-cells = <3>; + }; diff --git a/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt deleted file mode 100644 index afa501bf7f94..000000000000 --- a/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt +++ /dev/null @@ -1,29 +0,0 @@ -Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver - -The Atmel HLCDC PWM is subdevice of the HLCDC MFD device. -See ../mfd/atmel-hlcdc.txt for more details. - -Required properties: - - compatible: value should be one of the following: - "atmel,hlcdc-pwm" - - pinctr-names: the pin control state names. Should contain "default". - - pinctrl-0: should contain the pinctrl states described by pinctrl - default. - - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells - bindings defined in pwm.yaml in this directory. - -Example: - - hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; - reg = <0xf0030000 0x2000>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; - clock-names = "periph_clk","sys_clk", "slow_clk"; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; - };