From patchwork Sun Jan 28 21:25:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Almeida?= X-Patchwork-Id: 13534657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69BCAC48285 for ; Sun, 28 Jan 2024 21:25:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E282310F956; Sun, 28 Jan 2024 21:25:43 +0000 (UTC) Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5ED7B10F955; Sun, 28 Jan 2024 21:25:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=ZabLYiK1CYMel8JukYGi2S/lIUCPgU/oF9HydEUjizI=; b=sTdTnV8KGZYjh/k/J0CAcEaB+f N+u1qMUI4AKBfpjYRhut8fxG8FOpeB02fQ7ai+fnzPn11XMuEH2ZQdHNtDrdi/pDYDBGYX9bua03n UYp3F5gcke50iXJrtPwkRG2OuEynoW83lLc8u9llPAieTketeDqLDME7eL8pZw9zX+zpnkiXSt01Z sofkQ71aBbylnAPbhtNmRhMrseYrXuLpw1QVv0Ct9Kj3Ey+EzH7Z4bCGb8Zjf0Pz5QZv1tx69BAxo OKEPVMghNpyCIVyfMXROq8LtZnYTXsxV3FLs7oWfyszRX/UQDOeO+n7SgtIvf77K8jbbZp0mdVcnx p4X8xgkg==; Received: from 201-42-129-61.dsl.telesp.net.br ([201.42.129.61] helo=steammachine.lan) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1rUCek-00B1M8-Mr; Sun, 28 Jan 2024 22:25:35 +0100 From: =?utf-8?q?Andr=C3=A9_Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] drm/amdgpu: Implement check_async_props for planes Date: Sun, 28 Jan 2024 18:25:15 -0300 Message-ID: <20240128212515.630345-4-andrealmeid@igalia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240128212515.630345-1-andrealmeid@igalia.com> References: <20240128212515.630345-1-andrealmeid@igalia.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Andr=C3=A9_Almeida?= , daniel@ffwll.ch, =?utf-8?b?J01hcmVrIE9sxaHDoWsn?= , =?utf-8?q?Michel_D?= =?utf-8?q?=C3=A4nzer?= , Xaver Hugl , Pekka Paalanen , Joshua Ashton , kernel-dev@igalia.com, alexander.deucher@amd.com, Dave Airlie , christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" AMD GPUs can do async flips with changes on more properties than just the FB ID, so implement a custom check_async_props for AMD planes. Allow amdgpu to do async flips with overlay planes as well. Signed-off-by: André Almeida --- v3: allow overlay planes .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 116121e647ca..ed75b69636b4 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -25,6 +25,7 @@ */ #include +#include #include #include #include @@ -1430,6 +1431,33 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane, drm_atomic_helper_plane_destroy_state(plane, state); } +static int amdgpu_dm_plane_check_async_props(struct drm_property *prop, + struct drm_plane *plane, + struct drm_plane_state *plane_state, + struct drm_mode_object *obj, + u64 prop_value, u64 old_val) +{ + struct drm_mode_config *config = &plane->dev->mode_config; + int ret; + + if (prop != config->prop_fb_id && + prop != config->prop_in_fence_fd) { + ret = drm_atomic_plane_get_property(plane, plane_state, + prop, &old_val); + return drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); + } + + if (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY && + plane_state->plane->type != DRM_PLANE_TYPE_OVERLAY) { + drm_dbg_atomic(prop->dev, + "[OBJECT:%d] Only primary or overlay planes can be changed during async flip\n", + obj->id); + return -EINVAL; + } + + return 0; +} + static const struct drm_plane_funcs dm_plane_funcs = { .update_plane = drm_atomic_helper_update_plane, .disable_plane = drm_atomic_helper_disable_plane, @@ -1438,6 +1466,7 @@ static const struct drm_plane_funcs dm_plane_funcs = { .atomic_duplicate_state = amdgpu_dm_plane_drm_plane_duplicate_state, .atomic_destroy_state = amdgpu_dm_plane_drm_plane_destroy_state, .format_mod_supported = amdgpu_dm_plane_format_mod_supported, + .check_async_props = amdgpu_dm_plane_check_async_props, }; int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,