| Message ID | 20240206031857.113981-1-kuro.chung@ite.com.tw (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | UPSTREAM: drm/bridge: it6505: fix hibernate to resume no display issue | expand |
Hi Pin-yen, I want to upload the patch to let the patch could be review on website, https://chromium-review.googlesource.com/dashboard/self But the message ' No Contributor Agreement on file for user Allen Chen ' seems no longer have Permissions for this file, right? It have an issue need to update the ite-it6505.c, Could you give me some advising? Thank you very much. BR Kuro Chung ite@ite-XPS-13-9360:~/project/it6505/google/source/cros/src/third_party/kernel/v5.15$ git push cros HEAD:refs/for/chromeos-5.15 remote: PERMISSION_DENIED: The caller does not have permission remote: [type.googleapis.com/google.rpc.LocalizedMessage] remote: locale: "en-US" remote: message: "No Contributor Agreement on file for user Allen Chen <allen.chen@ite.corp-partner.google.com> (id=1321515)" remote: remote: [type.googleapis.com/google.rpc.RequestInfo] remote: request_id: "3c171f2fe78e458ebbb2990bab93cfb3" remote: remote: [type.googleapis.com/google.rpc.RequestInfo] remote: request_id: "c5662672e00f42e1b6562149270c7864" fatal: unable to access 'https://chromium.googlesource.com/chromiumos/third_party/kernel/': The requested URL returned error: 403 BR Kuro Chung -----Original Message----- From: Kuro Chung (鐘仕廷) <kuro.chung@ite.com.tw> Sent: Tuesday, February 6, 2024 11:19 AM Cc: Allen Chen <allen.chen@ite.com.tw>; Pin-yen Lin <treapking@chromium.org>; Kuro Chung (鐘仕廷) <kuro.chung@ite.com.tw>; Kenneth Hung (洪家倫) <Kenneth.Hung@ite.com.tw>; Andrzej Hajda <a.hajda@samsung.com>; Neil Armstrong <narmstrong@baylibre.com>; Robert Foss <robert.foss@linaro.org>; Laurent Pinchart <Laurent.pinchart@ideasonboard.com>; Jonas Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; open list:DRM DRIVERS <dri-devel@lists.freedesktop.org>; open list <linux-kernel@vger.kernel.org> Subject: [PATCH] UPSTREAM: drm/bridge: it6505: fix hibernate to resume no display issue From: allen chen <allen.chen@ite.com.tw> Change-Id: Iaa3cd9da92a625496f579d87d0ab74ca9c4937c4 --- drivers/gpu/drm/bridge/ite-it6505.c | 42 ++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index b53da9bb65a1..07883001e6ca 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -1318,6 +1318,8 @@ static void it6505_video_reset(struct it6505 *it6505) it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x02); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); @@ -2480,10 +2482,6 @@ static void it6505_irq_video_fifo_error(struct it6505 *it6505) struct device *dev = &it6505->client->dev; DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); } static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) @@ -2491,10 +2489,6 @@ static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) struct device *dev = &it6505->client->dev; DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); } static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) @@ -2522,7 +2516,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, }; - int int_status[3], i; + int int_status[3], i, reg_0d; if (it6505->enable_drv_hold || !it6505->powered) return IRQ_HANDLED; @@ -2550,6 +2544,36 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) irq_vec[i].handler(it6505); } + + if ((it6505_test_bit(irq_vec[9].bit, (unsigned int *)int_status)) || + (it6505_test_bit(irq_vec[10].bit, (unsigned int *)int_status))) { + it6505->auto_train_retry = AUTO_TRAIN_RETRY; + flush_work(&it6505->link_works); + it6505_stop_hdcp(it6505); + it6505_video_reset(it6505); + + DRM_DEV_DEBUG_DRIVER(dev, "Video Error reset wait video..."); + + for (i = 0; i < 10; i++) { + usleep_range(10000, 11000); + int_status[2] = it6505_read(it6505, INT_STATUS_03); + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); + it6505_write(it6505, INT_STATUS_03, int_status[2]); + + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", int_status[2]); + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); + if ((reg_0d & VIDEO_STB) && (reg_0d >= 0)) + break; + + if ((it6505_test_bit(irq_vec[9].bit, (unsigned int *)int_status)) || (it6505_test_bit(irq_vec[10].bit, (unsigned int *)int_status))) { + it6505_video_reset(it6505); + DRM_DEV_DEBUG_DRIVER(dev, "Video Error reset wait video (%d)", i); + } + + } + + } + } pm_runtime_put_sync(dev); -- 2.25.1
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index b53da9bb65a1..07883001e6ca 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -1318,6 +1318,8 @@ static void it6505_video_reset(struct it6505 *it6505) it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x02); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); @@ -2480,10 +2482,6 @@ static void it6505_irq_video_fifo_error(struct it6505 *it6505) struct device *dev = &it6505->client->dev; DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); } static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) @@ -2491,10 +2489,6 @@ static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) struct device *dev = &it6505->client->dev; DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); } static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) @@ -2522,7 +2516,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, }; - int int_status[3], i; + int int_status[3], i, reg_0d; if (it6505->enable_drv_hold || !it6505->powered) return IRQ_HANDLED; @@ -2550,6 +2544,36 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) irq_vec[i].handler(it6505); } + + if ((it6505_test_bit(irq_vec[9].bit, (unsigned int *)int_status)) || + (it6505_test_bit(irq_vec[10].bit, (unsigned int *)int_status))) { + it6505->auto_train_retry = AUTO_TRAIN_RETRY; + flush_work(&it6505->link_works); + it6505_stop_hdcp(it6505); + it6505_video_reset(it6505); + + DRM_DEV_DEBUG_DRIVER(dev, "Video Error reset wait video..."); + + for (i = 0; i < 10; i++) { + usleep_range(10000, 11000); + int_status[2] = it6505_read(it6505, INT_STATUS_03); + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); + it6505_write(it6505, INT_STATUS_03, int_status[2]); + + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", int_status[2]); + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); + if ((reg_0d & VIDEO_STB) && (reg_0d >= 0)) + break; + + if ((it6505_test_bit(irq_vec[9].bit, (unsigned int *)int_status)) || (it6505_test_bit(irq_vec[10].bit, (unsigned int *)int_status))) { + it6505_video_reset(it6505); + DRM_DEV_DEBUG_DRIVER(dev, "Video Error reset wait video (%d)", i); + } + + } + + } + } pm_runtime_put_sync(dev);
From: allen chen <allen.chen@ite.com.tw> Change-Id: Iaa3cd9da92a625496f579d87d0ab74ca9c4937c4 --- drivers/gpu/drm/bridge/ite-it6505.c | 42 ++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 9 deletions(-)