[09/13] accel/habanalabs/gaudi2: drain event lacks rd/wr indication

Commit Message

Oded Gabbay Feb. 20, 2024, 4:01 p.m. UTC

From: Ofir Bitton <[e-mail]>

Due to a H/W issue, AXI drain event does not include a read/write
indication, hence we remove this print.

Signed-off-by: Ofir Bitton <[e-mail]>
Reviewed-by: Oded Gabbay <[e-mail]>
Signed-off-by: Oded Gabbay <[e-mail]>
---
 drivers/accel/habanalabs/gaudi2/gaudi2.c | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

Comments

Carl Vanderlip Feb. 23, 2024, 11:17 p.m. UTC | #1

On 2/20/2024 8:01 AM, Oded Gabbay wrote:
> From: Ofir Bitton <[e-mail]>
> 
> Due to a H/W issue, AXI drain event does not include a read/write
> indication, hence we remove this print.
> 
> Signed-off-by: Ofir Bitton <[e-mail]>
> Reviewed-by: Oded Gabbay <[e-mail]>
> Signed-off-by: Oded Gabbay <[e-mail]>

Reviewed-by: Carl Vanderlip <[e-mail]>

Patch

diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2.c b/drivers/accel/habanalabs/gaudi2/gaudi2.c
index 189d8da6a624..ba1518f2bf5c 100644
--- a/drivers/accel/habanalabs/gaudi2/gaudi2.c
+++ b/drivers/accel/habanalabs/gaudi2/gaudi2.c
@@ -9548,25 +9548,17 @@  static int gaudi2_handle_pcie_p2p_msix(struct hl_device *hdev, u16 event_type)
 static int gaudi2_handle_pcie_drain(struct hl_device *hdev,
 			struct hl_eq_pcie_drain_ind_data *drain_data)
 {
-	u64 lbw_rd, lbw_wr, hbw_rd, hbw_wr, cause, error_count = 0;
+	u64 cause, error_count = 0;
 
 	cause = le64_to_cpu(drain_data->intr_cause.intr_cause_data);
-	lbw_rd = le64_to_cpu(drain_data->drain_rd_addr_lbw);
-	lbw_wr = le64_to_cpu(drain_data->drain_wr_addr_lbw);
-	hbw_rd = le64_to_cpu(drain_data->drain_rd_addr_hbw);
-	hbw_wr = le64_to_cpu(drain_data->drain_wr_addr_hbw);
 
 	if (cause & BIT_ULL(0)) {
-		dev_err_ratelimited(hdev->dev,
-			"PCIE AXI drain LBW completed, read_err %u, write_err %u\n",
-			!!lbw_rd, !!lbw_wr);
+		dev_err_ratelimited(hdev->dev, "PCIE AXI drain LBW completed\n");
 		error_count++;
 	}
 
 	if (cause & BIT_ULL(1)) {
-		dev_err_ratelimited(hdev->dev,
-			"PCIE AXI drain HBW completed, raddr %#llx, waddr %#llx\n",
-			hbw_rd, hbw_wr);
+		dev_err_ratelimited(hdev->dev, "PCIE AXI drain HBW completed\n");
 		error_count++;
 	}