| Message ID | 20240319-dpu-mode-config-width-v1-5-d0fe6bf81bf1@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/dpu: be more friendly to X.org | expand |
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote: > Check that the plane pitch doesn't overflow the maximum pitch size > allowed by the hardware. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 +++++- > 2 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > index b7dc52312c39..86b1defa5d21 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > @@ -12,6 +12,8 @@ > > struct dpu_hw_sspp; > > +#define DPU_SSPP_MAX_PITCH_SIZE 0xffff > + You obtained this value from below code right? if (pipe->multirect_index == DPU_SSPP_RECT_0) { 487 ystride0 = (ystride0 & 0xFFFF0000) | 488 (layout->plane_pitch[0] & 0x0000FFFF); 489 ystride1 = (ystride1 & 0xFFFF0000)| 490 (layout->plane_pitch[2] & 0x0000FFFF); 491 } else { 492 ystride0 = (ystride0 & 0x0000FFFF) | 493 ((layout->plane_pitch[0] << 16) & 494 0xFFFF0000); 495 ystride1 = (ystride1 & 0x0000FFFF) | 496 ((layout->plane_pitch[2] << 16) & 497 0xFFFF0000); 498 } Seems correct, but was just curious Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
On Fri, Apr 19, 2024 at 05:16:30PM -0700, Abhinav Kumar wrote: > > > On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote: > > Check that the plane pitch doesn't overflow the maximum pitch size > > allowed by the hardware. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 +++++- > > 2 files changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > > index b7dc52312c39..86b1defa5d21 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h > > @@ -12,6 +12,8 @@ > > struct dpu_hw_sspp; > > +#define DPU_SSPP_MAX_PITCH_SIZE 0xffff > > + > > You obtained this value from below code right? Yes. And also from DPU_MAX_IMG_WIDTH / MAX_IMG_WIDTH. > > if (pipe->multirect_index == DPU_SSPP_RECT_0) { > 487 ystride0 = (ystride0 & 0xFFFF0000) | > 488 (layout->plane_pitch[0] & 0x0000FFFF); > 489 ystride1 = (ystride1 & 0xFFFF0000)| > 490 (layout->plane_pitch[2] & 0x0000FFFF); > 491 } else { > 492 ystride0 = (ystride0 & 0x0000FFFF) | > 493 ((layout->plane_pitch[0] << 16) & > 494 0xFFFF0000); > 495 ystride1 = (ystride1 & 0x0000FFFF) | > 496 ((layout->plane_pitch[2] << 16) & > 497 0xFFFF0000); > 498 } > > Seems correct, but was just curious > > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index b7dc52312c39..86b1defa5d21 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -12,6 +12,8 @@ struct dpu_hw_sspp; +#define DPU_SSPP_MAX_PITCH_SIZE 0xffff + /** * Flags */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index a9de1fbd0df3..9e57c51f5343 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -790,7 +790,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, { struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); - int ret = 0, min_scale; + int i, ret = 0, min_scale; struct dpu_plane *pdpu = to_dpu_plane(plane); struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate; @@ -864,6 +864,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, return ret; } + for (i = 0; i < pstate->layout.num_planes; i++) + if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE) + return -E2BIG; + fmt = to_dpu_format(msm_framebuffer_format(new_plane_state->fb)); max_linewidth = pdpu->catalog->caps->max_linewidth;
Check that the plane pitch doesn't overflow the maximum pitch size allowed by the hardware. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-)