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Mon, 01 Apr 2024 19:57:19 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 02 Apr 2024 05:57:17 +0300 Subject: [PATCH v3 3/4] arm64: dts: qcom: sc8180x: Drop flags for mdss irqs MIME-Version: 1.0 Message-Id: <20240402-fd-fix-schema-v3-3-817ea6ddf775@linaro.org> References: <20240402-fd-fix-schema-v3-0-817ea6ddf775@linaro.org> In-Reply-To: <20240402-fd-fix-schema-v3-0-817ea6ddf775@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1550; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ZjqkKDc8DJv3bb82aWF6rG7TXxmc2eeO/VaiOfqbMnY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmC3QM9Kxk3hwvb09OlJ9nDtKjXYTVkiYfBD7l1 q9qbaQhvwiJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgt0DAAKCRCLPIo+Aiko 1aNZCACZyNclBB4r6VXGa7ois5UQYWKrwpfg4MWCi1QjvtaNWRUGu0ahjUzFifVlG/oTkTnKr2o 3ykyzBrYFUixoTZmVwgdnUXZbAqN/Maexbh5o0ay1FWZHm27PsBbib89a1+YRGqsl8hI/k0JjK9 KFI64XKlSrfRaQ09BepY/efhwZWwE722dwyA8dYPfqCHgq/diVX/GgoqoR16fyXJBOIjVesdJN/ imkLZfO9XRI01HmDZZY1paUGm7i0tYWvtHm3DpWvJspUiA/56wGobJcjnj6kTkQpcLbnS9Btym/ 0cbDFE+5AAcJXY2oyl88/WiBDI72g1LE3OKWORC+dlQJZxHu X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Fixes: 494dec9b6f54 ("arm64: dts: qcom: sc8180x: Add display and gpu nodes") Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 99462b42cfc5..6d74867d3b61 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2804,7 +2804,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SC8180X_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>; @@ -2877,7 +2877,7 @@ mdss_dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, @@ -2963,7 +2963,7 @@ mdss_dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,