From patchwork Fri Apr 5 08:41:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13618676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25470C67861 for ; Fri, 5 Apr 2024 08:41:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 31F84113A92; Fri, 5 Apr 2024 08:41:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="U7g/mDQk"; dkim-atps=neutral Received: from mail-lj1-f177.google.com (mail-lj1-f177.google.com [209.85.208.177]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15396113A8A for ; Fri, 5 Apr 2024 08:41:44 +0000 (UTC) Received: by mail-lj1-f177.google.com with SMTP id 38308e7fff4ca-2d700beb60bso31051811fa.1 for ; Fri, 05 Apr 2024 01:41:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1712306502; x=1712911302; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=X04cOGIXIpn74O231A72oQJ+8vGZIsJ7iLKhJyEMwh4=; b=U7g/mDQkw6zSiqpA/CWa5ZOCviMs1zfesMl7R3HtkbT5pAM1unwn8mJ7xs6w05mOA6 ZNgI8+ghU37jsIvmitfJzI1jFbIL2SWiu72q8CO2N5SR61ywLdd6TWSl3fviC4OwAlIT DAsqiRs4YEtGtEugzvz2cO7jPcA8Matbv5hUudI8LAL1TdU6w5AwnA72avQ4sW14UNa6 7ihy/KtJmQHa/uSTFPjNEHLcGU59wMInvZouPMj6e4u+PusP4seDnt5suLf77KvzKzeS A3Rr669zpl6O788UFynY7yr0d91wE/J5+Cp+Jbb2rpsCElSOA4tXOk9jSR1M2/BHVxj3 dA/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712306502; x=1712911302; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X04cOGIXIpn74O231A72oQJ+8vGZIsJ7iLKhJyEMwh4=; b=nTLGOocnU3W548muInmLz43JZU77l3/MVjC988ywPtF00d3lvQKpJAav37pVqXOI3z dgV0joSobQQ9OE4DGKD7xSEr1H71uk0JlaPDD76LGKvE9iGoyILDJ+eGNTU0rEN9TsXG TSb9ExI9CBK4hHLqTbanLaZfBqi3RkOVBOa+yduwbmUT8WF7rVZHXnQRnQUmKa04g+xM UQq314gzBMPjVFLHOKj3DaM2klQKccn9P2nHfGEH6dbIP55dYstoVLKTjFQ/rDAQqLWT I+rFCUPfdCSjEF5OGkXyL+is+uz49lenG6m23xPjPLUAmICJIcSF4HyfKh7V0XjoNJbi F3hA== X-Forwarded-Encrypted: i=1; AJvYcCVeyOq2WLNiztUnS9Ixzl/L+lI/dvpEIME8ohXIgDWNtumToVu0nMpiHJrP6j0bOndbQ32R34VWHURTxfCpORX2D7rCD6WpqWTeOMW1aYwO X-Gm-Message-State: AOJu0Yz+W8mCQ/Jy8yROeWl3mKRDzpvW1RySRimTVO1fdYRqtoX+QdK5 CM0TZL5isVlPCr4A0XqGChnvCdi2xGt1cO1IfPIuJTM8QyUCfxQNKqpXeYNobHc= X-Google-Smtp-Source: AGHT+IEaoyjVPXNaHJVLqh2HFfjOBPe62rwY6OgCDrYa4WIoKPR3hqGj3KeEFkwYiLQdakO91Cypiw== X-Received: by 2002:a2e:980a:0:b0:2d6:c749:17bc with SMTP id a10-20020a2e980a000000b002d6c74917bcmr897025ljj.31.1712306502374; Fri, 05 Apr 2024 01:41:42 -0700 (PDT) Received: from [127.0.1.1] (netpanel-87-246-222-101.pol.akademiki.lublin.pl. [87.246.222.101]) by smtp.gmail.com with ESMTPSA id y3-20020a05651c020300b002d429304a20sm116880ljn.8.2024.04.05.01.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Apr 2024 01:41:42 -0700 (PDT) From: Konrad Dybcio Date: Fri, 05 Apr 2024 10:41:34 +0200 Subject: [PATCH 6/6] arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs MIME-Version: 1.0 Message-Id: <20240405-topic-smem_speedbin-v1-6-ce2b864251b1@linaro.org> References: <20240405-topic-smem_speedbin-v1-0-ce2b864251b1@linaro.org> In-Reply-To: <20240405-topic-smem_speedbin-v1-0-ce2b864251b1@linaro.org> To: Bjorn Andersson , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Neil Armstrong , Konrad Dybcio X-Mailer: b4 0.13-dev-0438c X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the speedbin masks to ensure only the desired OPPs are available on chips of a given bin. Using this, add the binned 719 MHz OPP and the non-binned 124.8 MHz. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 5cae8d773cec..2f6842f6a5b7 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2087,48 +2087,67 @@ zap-shader { memory-region = <&gpu_micro_code_mem>; }; - /* Speedbin needs more work on A740+, keep only lower freqs */ gpu_opp_table: opp-table { compatible = "operating-points-v2"; + opp-719000000 { + opp-hz = /bits/ 64 <719000000>; + opp-level = ; + opp-supported-hw = <0x1>; + }; + opp-680000000 { opp-hz = /bits/ 64 <680000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-615000000 { opp-hz = /bits/ 64 <615000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-550000000 { opp-hz = /bits/ 64 <550000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-475000000 { opp-hz = /bits/ 64 <475000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-401000000 { opp-hz = /bits/ 64 <401000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-348000000 { opp-hz = /bits/ 64 <348000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-295000000 { opp-hz = /bits/ 64 <295000000>; opp-level = ; + opp-supported-hw = <0x3>; }; opp-220000000 { opp-hz = /bits/ 64 <220000000>; opp-level = ; + opp-supported-hw = <0x3>; + }; + + opp-124800000 { + opp-hz = /bits/ 64 <124800000>; + opp-level = ; + opp-supported-hw = <0x3>; }; }; };