From patchwork Mon May 20 10:48:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 13668191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C199FC25B7B for ; Mon, 20 May 2024 11:04:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E2FD10E625; Mon, 20 May 2024 11:04:51 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Iqt2fJwV"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 256FF10E625; Mon, 20 May 2024 11:04:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716203085; x=1747739085; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dNPMe/f+pjUVEjS0qbFeFzxhuh7+5l3O3WZciVoD/E0=; b=Iqt2fJwVSLdlCizT1kumMmFI2rNxZIe+lgmrfnyJIODnVaTkrSIj5sq7 PdyGtNPPqrz2XBn33hnmEZMRu8w9mhDRT1PZ1Rk0ivZDx64Ft9rgwagko S4wNPx+3xKP1u+XaOzefjK6AV3BPpPQwaZVwFJRzSck5/MoBd9cbap+PX 4rR++Vw7Q7vVnoxmt0U2Agn6DVe1Du4bUo9BOy7UCq05hnAM3qJDQm2fc ndu1lX5VuTb9/ejFNqLsQBnCLRBPeRwF4WzRQmntz0Jw8MN+ktw2MTHzV CL0CxEmUjJwj7TdtI/JWP2iNN2XnUah//pu41QyOI32wEWxy3inaQ1utL A==; X-CSE-ConnectionGUID: E+PmgQklQyqBEQHXMF2WDA== X-CSE-MsgGUID: pVbG1uH9SpmLtEJguQ3yfg== X-IronPort-AV: E=McAfee;i="6600,9927,11077"; a="22996374" X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="22996374" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 04:04:45 -0700 X-CSE-ConnectionGUID: NMcTOsJrQqeZxvi/ixRfPA== X-CSE-MsgGUID: icik2KvzRvi0wf9GjYqjww== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="63723590" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa001.fm.intel.com with ESMTP; 20 May 2024 04:04:36 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, jani.nikula@intel.com, jouni.hogander@intel.com, arun.r.murthy@intel.com Subject: [PATCH v5 3/6] drm/display: Add missing aux less alpm wake related bits Date: Mon, 20 May 2024 16:18:19 +0530 Message-Id: <20240520104822.1116122-4-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20240520104822.1116122-1-animesh.manna@intel.com> References: <20240520104822.1116122-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Jouni Högander eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these. Signed-off-by: Jouni Högander --- include/drm/display/drm_dp.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 906949ca3cee..3317ff88ed59 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -232,6 +232,8 @@ #define DP_RECEIVER_ALPM_CAP 0x02e /* eDP 1.4 */ # define DP_ALPM_CAP (1 << 0) +# define DP_ALPM_PM_STATE_2A_SUPPORT (1 << 1) /* eDP 1.5 */ +# define DP_ALPM_AUX_LESS_CAP (1 << 2) /* eDP 1.5 */ #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP 0x02f /* eDP 1.4 */ # define DP_AUX_FRAME_SYNC_CAP (1 << 0) @@ -683,7 +685,8 @@ #define DP_RECEIVER_ALPM_CONFIG 0x116 /* eDP 1.4 */ # define DP_ALPM_ENABLE (1 << 0) -# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE (1 << 1) +# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE (1 << 1) /* eDP 1.5 */ +# define DP_ALPM_MODE_AUX_LESS (1 << 2) /* eDP 1.5 */ #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF 0x117 /* eDP 1.4 */ # define DP_AUX_FRAME_SYNC_ENABLE (1 << 0)