| Message ID | 20240522-fd-hdmi-hpd-v2-5-c30bdb7c5c7e@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/hdmi: rework and fix the HPD even generation | expand |
On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote: > The only clock which has frequency being set through hpd_freqs is the > "core" aka MDSS_HDMI_CLK clock. It always has the specified frequency, > so we can drop corresponding clk_set_rate() call together with the > hpd_freq infrastructure. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> > --- > drivers/gpu/drm/msm/hdmi/hdmi.c | 2 -- > drivers/gpu/drm/msm/hdmi/hdmi.h | 1 - > drivers/gpu/drm/msm/hdmi/hdmi_hpd.c | 9 --------- > 3 files changed, 12 deletions(-) > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c > index 681265e29aa0..c14e009f38b1 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c > @@ -236,12 +236,10 @@ static const struct hdmi_platform_config hdmi_tx_8960_config = { > > static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"}; > static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"}; > -static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0, 0}; > > static const struct hdmi_platform_config hdmi_tx_8974_config = { > HDMI_CFG(pwr_reg, 8x74), > HDMI_CFG(hpd_clk, 8x74), > - .hpd_freq = hpd_clk_freq_8x74, > }; > > /* > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h > index abdbe4779cf9..c0d60ed23b75 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi.h > +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h > @@ -96,7 +96,6 @@ struct hdmi_platform_config { > > /* clks that need to be on for hpd: */ > const char **hpd_clk_names; > - const long unsigned *hpd_freq; > int hpd_clk_cnt; > }; > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c > index 9ce0ffa35417..7ae69b14e953 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c > @@ -68,15 +68,6 @@ static void enable_hpd_clocks(struct hdmi *hdmi, bool enable) > > if (enable) { > for (i = 0; i < config->hpd_clk_cnt; i++) { > - if (config->hpd_freq && config->hpd_freq[i]) { > - ret = clk_set_rate(hdmi->hpd_clks[i], > - config->hpd_freq[i]); > - if (ret) > - dev_warn(dev, > - "failed to set clk %s (%d)\n", > - config->hpd_clk_names[i], ret); > - } > - > ret = clk_prepare_enable(hdmi->hpd_clks[i]); > if (ret) { > DRM_DEV_ERROR(dev, > > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index 681265e29aa0..c14e009f38b1 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c @@ -236,12 +236,10 @@ static const struct hdmi_platform_config hdmi_tx_8960_config = { static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"}; static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"}; -static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0, 0}; static const struct hdmi_platform_config hdmi_tx_8974_config = { HDMI_CFG(pwr_reg, 8x74), HDMI_CFG(hpd_clk, 8x74), - .hpd_freq = hpd_clk_freq_8x74, }; /* diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h index abdbe4779cf9..c0d60ed23b75 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.h +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h @@ -96,7 +96,6 @@ struct hdmi_platform_config { /* clks that need to be on for hpd: */ const char **hpd_clk_names; - const long unsigned *hpd_freq; int hpd_clk_cnt; }; diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c index 9ce0ffa35417..7ae69b14e953 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c @@ -68,15 +68,6 @@ static void enable_hpd_clocks(struct hdmi *hdmi, bool enable) if (enable) { for (i = 0; i < config->hpd_clk_cnt; i++) { - if (config->hpd_freq && config->hpd_freq[i]) { - ret = clk_set_rate(hdmi->hpd_clks[i], - config->hpd_freq[i]); - if (ret) - dev_warn(dev, - "failed to set clk %s (%d)\n", - config->hpd_clk_names[i], ret); - } - ret = clk_prepare_enable(hdmi->hpd_clks[i]); if (ret) { DRM_DEV_ERROR(dev,
The only clock which has frequency being set through hpd_freqs is the "core" aka MDSS_HDMI_CLK clock. It always has the specified frequency, so we can drop corresponding clk_set_rate() call together with the hpd_freq infrastructure. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/gpu/drm/msm/hdmi/hdmi.c | 2 -- drivers/gpu/drm/msm/hdmi/hdmi.h | 1 - drivers/gpu/drm/msm/hdmi/hdmi_hpd.c | 9 --------- 3 files changed, 12 deletions(-)