@@ -168,6 +168,15 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *intf,
data_width = p->width;
+ /*
+ * If widebus is enabled, data is valid for only half the active window
+ * since the data rate is doubled in this mode. But for the compression
+ * mode in DP case, the p->width is already adjusted in
+ * drm_mode_to_intf_timing_params()
+ */
+ if (p->wide_bus_en && !dp_intf)
+ data_width = p->width >> 1;
+
hsync_data_start_x = hsync_start_x;
hsync_data_end_x = hsync_start_x + data_width - 1;