| Message ID | 20240613-dpu-handle-te-signal-v2-5-67a0116b5366@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/msm/dpu: handle non-default TE source pins | expand |
Maybe retitle this to something that more closely resembles "remove unset is_te_using_watchdog_timer field"? On 2024-06-13 20:05:08, Dmitry Baryshkov wrote: > The struct msm_display_info has is_te_using_watchdog_timer field which > is neither used anywhere nor is flexible enough to specify different Well, it's "used", but not "set" (to anything other than the zero-initialized default). s/used/set? > sources. Replace it with the field specifying the vsync source using > enum dpu_vsync_source. > > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patch itself is fine, just think the title could be clearer: Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +---- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 ++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 ++ > 3 files changed, 5 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index bd37a56b4d03..b147f8814a18 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -743,10 +743,7 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, > vsync_cfg.pp_count = dpu_enc->num_phys_encs; > vsync_cfg.frame_rate = drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode); > > - if (disp_info->is_te_using_watchdog_timer) > - vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0; > - else > - vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_GPIO_0; > + vsync_cfg.vsync_source = disp_info->vsync_source; > > hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg); > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h > index 76be77e30954..cb59bd4436f4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h > @@ -26,15 +26,14 @@ > * @h_tile_instance: Controller instance used per tile. Number of elements is > * based on num_of_h_tiles > * @is_cmd_mode Boolean to indicate if the CMD mode is requested > - * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is > - * used instead of panel TE in cmd mode panels > + * @vsync_source: Source of the TE signal for DSI CMD devices > */ > struct msm_display_info { > enum dpu_intf_type intf_type; > uint32_t num_of_h_tiles; > uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; > bool is_cmd_mode; > - bool is_te_using_watchdog_timer; > + enum dpu_vsync_source vsync_source; > }; > > /** > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > index 1955848b1b78..e9991f3756d4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > @@ -543,6 +543,8 @@ static int _dpu_kms_initialize_dsi(struct drm_device *dev, > > info.is_cmd_mode = msm_dsi_is_cmd_mode(priv->dsi[i]); > > + info.vsync_source = DPU_VSYNC_SOURCE_GPIO_0; > + > encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DSI, &info); > if (IS_ERR(encoder)) { > DPU_ERROR("encoder init failed for dsi display\n"); > > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index bd37a56b4d03..b147f8814a18 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -743,10 +743,7 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, vsync_cfg.pp_count = dpu_enc->num_phys_encs; vsync_cfg.frame_rate = drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode); - if (disp_info->is_te_using_watchdog_timer) - vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0; - else - vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_GPIO_0; + vsync_cfg.vsync_source = disp_info->vsync_source; hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 76be77e30954..cb59bd4436f4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -26,15 +26,14 @@ * @h_tile_instance: Controller instance used per tile. Number of elements is * based on num_of_h_tiles * @is_cmd_mode Boolean to indicate if the CMD mode is requested - * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is - * used instead of panel TE in cmd mode panels + * @vsync_source: Source of the TE signal for DSI CMD devices */ struct msm_display_info { enum dpu_intf_type intf_type; uint32_t num_of_h_tiles; uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; bool is_cmd_mode; - bool is_te_using_watchdog_timer; + enum dpu_vsync_source vsync_source; }; /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 1955848b1b78..e9991f3756d4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -543,6 +543,8 @@ static int _dpu_kms_initialize_dsi(struct drm_device *dev, info.is_cmd_mode = msm_dsi_is_cmd_mode(priv->dsi[i]); + info.vsync_source = DPU_VSYNC_SOURCE_GPIO_0; + encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DSI, &info); if (IS_ERR(encoder)) { DPU_ERROR("encoder init failed for dsi display\n");