| Message ID | 20240623120026.44198-3-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] dt-bindings: display/msm/gpu: constrain clocks in top-level | expand |
On Sun, Jun 23, 2024 at 02:00:26PM +0200, Krzysztof Kozlowski wrote: > MMIO address space is known per each variant of Adreno GPU, so we can > constrain the reg/reg-names entries for each variant. There is no DTS > for A619, so that part is not accurate but could be corrected later. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../devicetree/bindings/display/msm/gpu.yaml | 87 +++++++++++++++++-- > 1 file changed, 79 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index baea1946c65d..e83f13123fc9 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -130,6 +130,22 @@ required: > additionalProperties: false > > allOf: > + - if: > + properties: > + compatible: > + contains: > + pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$' Does the regex "^qcom,adreno-[0-9a-f]{8}$" not work in dt-schema, rather than this repeat-a-number-of-times-I-cannot-grok that's happening here? (I know you probably just copied this from above in the file...)
On 23/06/2024 16:13, Conor Dooley wrote: > On Sun, Jun 23, 2024 at 02:00:26PM +0200, Krzysztof Kozlowski wrote: >> MMIO address space is known per each variant of Adreno GPU, so we can >> constrain the reg/reg-names entries for each variant. There is no DTS >> for A619, so that part is not accurate but could be corrected later. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> .../devicetree/bindings/display/msm/gpu.yaml | 87 +++++++++++++++++-- >> 1 file changed, 79 insertions(+), 8 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> index baea1946c65d..e83f13123fc9 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> @@ -130,6 +130,22 @@ required: >> additionalProperties: false >> >> allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$' > > Does the regex "^qcom,adreno-[0-9a-f]{8}$" not work in dt-schema, rather > than this repeat-a-number-of-times-I-cannot-grok that's happening here? > (I know you probably just copied this from above in the file...) I copied to be consistent, but let me simplify original code and use it also here. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index baea1946c65d..e83f13123fc9 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -130,6 +130,22 @@ required: additionalProperties: false allOf: + - if: + properties: + compatible: + contains: + pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$' + then: + properties: + reg: + minItems: 3 + + reg-names: + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + - const: cx_dbgc + - if: properties: compatible: @@ -164,6 +180,13 @@ allOf: minItems: 2 maxItems: 7 + reg: + maxItems: 1 + + reg-names: + items: + - const: kgsl_3d0_reg_memory + required: - clocks - clock-names @@ -196,11 +219,12 @@ allOf: - const: xo description: GPUCC clocksource clock + reg: + maxItems: 1 + reg-names: - minItems: 1 items: - const: kgsl_3d0_reg_memory - - const: cx_dbgc required: - clocks @@ -217,12 +241,59 @@ allOf: clocks: false clock-names: false - reg-names: - minItems: 1 - items: - - const: kgsl_3d0_reg_memory - - const: cx_mem - - const: cx_dbgc + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-640.1 + - qcom,adreno-680.1 + then: + properties: + reg: + maxItems: 1 + + reg-names: + items: + - const: kgsl_3d0_reg_memory + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-619.0 + - qcom,adreno-630.2 + then: + properties: + reg: + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-618.0 + - qcom,adreno-635.0 + - qcom,adreno-690.0 + - qcom,adreno-730.1 + then: + properties: + reg: + minItems: 3 + + reg-names: + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + - const: cx_dbgc examples: - |
MMIO address space is known per each variant of Adreno GPU, so we can constrain the reg/reg-names entries for each variant. There is no DTS for A619, so that part is not accurate but could be corrected later. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../devicetree/bindings/display/msm/gpu.yaml | 87 +++++++++++++++++-- 1 file changed, 79 insertions(+), 8 deletions(-)