From patchwork Wed Jul 3 10:50:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13722000 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F6ACC30653 for ; Wed, 3 Jul 2024 10:56:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03CA010E7A1; Wed, 3 Jul 2024 10:56:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=testtoast.com header.i=@testtoast.com header.b="vRIKjcFj"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="ZGEGGczL"; dkim-atps=neutral Received: from fhigh3-smtp.messagingengine.com (fhigh3-smtp.messagingengine.com [103.168.172.154]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6F11D10E7A1 for ; Wed, 3 Jul 2024 10:56:05 +0000 (UTC) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id CEF561140381; Wed, 3 Jul 2024 06:56:04 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Wed, 03 Jul 2024 06:56:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1720004164; x= 1720090564; bh=cux+34nh+ulo2PN/kYT7VG5ILDPHNeEI/xcJjfx83Is=; b=v RIKjcFj6pxPZYCcnS0puy4NFUnVCK+Hxb+N2NZYCb2boX9nlPeDuYIOzENCKyRuT A5Fx7CZucAwIob+x7vsagd6bXdz+ZSSJjaX6VSx7U4htyuA19h0Y1M/TUR4KFGW7 E7wrspa1cOP43pYQGUwOtNaC1EIyPMV+0RI0J6s+O2PdoSCQNEeUpydr0Wja8DqR Qw520dUbU5jttk+X9LWj1cdGg36Rz+yvvt4mvC8lkgItFyGRUxWLOox5T4gdCnDF feq9QDxJjUDFDsY4ll9YvIWdcIiblzDOtqMK762R6fm41Id3RYKRZKIDSj51P7mR yoO69NHaNrQ/QpuQfVkTw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1720004164; x= 1720090564; bh=cux+34nh+ulo2PN/kYT7VG5ILDPHNeEI/xcJjfx83Is=; b=Z GEGGczLATVdbUjMRNtimGh0Ie0fHQg1gjI4QXuSKsmIlk/BUg/F9n8yKBoHfuJ8g qaLmqU9lyJY3PTdTGHGGtN2qOm5oGDfnrzruJpE1SAXXy3tlvn8nXF5NzPZodPa+ xYuAK7RW2i631zCZIyj0Qljx5lGExb+joHKFoGxtjelYz9r4dR6xjdOMOBh1UUNX dGyt8RUmMHnUF11dXWfLrKFZo5As+OUW06r1crTvh/mE1rkakt4MICbGTyiKED5d mqmT7k5j0pDcZqNP53Lw4l1om7R5Fw5BRFr8TJ3wp94/+jrEElE2J7IkUcf0KLMZ y6j3qC7H1q8cORdjH5fLQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeeftddrudejgdefgecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefthigrnhcu hggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsthdrtghomheqnecuggftrfgrth htvghrnhepffehieffgedtgfffjeetveegfeekleeileekveeuteffteetudffveegieei heetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomheprh ihrghnsehtvghsthhtohgrshhtrdgtohhm X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 3 Jul 2024 06:55:58 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v2 08/23] drm: sun4i: de3: add YUV support to the DE3 mixer Date: Wed, 3 Jul 2024 22:50:58 +1200 Message-ID: <20240703105454.41254-9-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240703105454.41254-1-ryan@testtoast.com> References: <20240703105454.41254-1-ryan@testtoast.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Jernej Skrabec The mixer in the DE3 display engine supports YUV 8 and 10 bit formats in addition to 8-bit RGB. Add the required register configuration and format enumeration callback functions to the mixer, and store the in-use output format (defaulting to RGB) and color encoding in engine variables. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 55 ++++++++++++++++++++++++++-- drivers/gpu/drm/sun4i/sunxi_engine.h | 5 +++ 2 files changed, 56 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 0738ee6446330..ef8067b2cbc8c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -22,7 +22,10 @@ #include #include +#include + #include "sun4i_drv.h" +#include "sun50i_fmt.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_vi_layer.h" @@ -326,12 +329,52 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", interlaced ? "on" : "off"); + + if (engine->format == MEDIA_BUS_FMT_RGB888_1X24) + val = SUN8I_MIXER_BLEND_COLOR_BLACK; + else + val = 0xff108080; + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); + + if (mixer->cfg->has_formatter) + sun50i_fmt_setup(mixer, mode->hdisplay, + mode->vdisplay, mixer->engine.format); +} + +static u32 *sun8i_mixer_get_supported_fmts(struct sunxi_engine *engine, u32 *num) +{ + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + u32 *formats, count; + + count = 0; + + formats = kcalloc(5, sizeof(*formats), GFP_KERNEL); + if (!formats) + return NULL; + + if (mixer->cfg->has_formatter) { + formats[count++] = MEDIA_BUS_FMT_UYYVYY10_0_5X30; + formats[count++] = MEDIA_BUS_FMT_YUV8_1X24; + formats[count++] = MEDIA_BUS_FMT_UYVY8_1X16; + formats[count++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24; + } + + formats[count++] = MEDIA_BUS_FMT_RGB888_1X24; + + *num = count; + + return formats; } static const struct sunxi_engine_ops sun8i_engine_ops = { - .commit = sun8i_mixer_commit, - .layers_init = sun8i_layers_init, - .mode_set = sun8i_mixer_mode_set, + .commit = sun8i_mixer_commit, + .layers_init = sun8i_layers_init, + .mode_set = sun8i_mixer_mode_set, + .get_supported_fmts = sun8i_mixer_get_supported_fmts, }; static const struct regmap_config sun8i_mixer_regmap_config = { @@ -392,7 +435,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, dev_set_drvdata(dev, mixer); mixer->engine.ops = &sun8i_engine_ops; mixer->engine.node = dev->of_node; - + /* default output format, supported by all mixers */ + mixer->engine.format = MEDIA_BUS_FMT_RGB888_1X24; + /* default color encoding, ignored with RGB I/O */ + mixer->engine.encoding = DRM_COLOR_YCBCR_BT601; + if (of_property_present(dev->of_node, "iommus")) { /* * This assume we have the same DMA constraints for diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index 98a78990fa870..608a26c3f9911 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -6,6 +6,8 @@ #ifndef _SUNXI_ENGINE_H_ #define _SUNXI_ENGINE_H_ +#include + struct drm_plane; struct drm_device; struct drm_crtc_state; @@ -148,6 +150,9 @@ struct sunxi_engine { int id; + u32 format; + enum drm_color_encoding encoding; + /* Engine list management */ struct list_head list; };