From patchwork Tue Aug 6 21:44:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13755352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47225C52D6F for ; Tue, 6 Aug 2024 21:45:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4C3B410E40C; Tue, 6 Aug 2024 21:45:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="UYftF/Me"; dkim-atps=neutral Received: from mail-oi1-f181.google.com (mail-oi1-f181.google.com [209.85.167.181]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1F20710E32A; Tue, 6 Aug 2024 21:45:10 +0000 (UTC) Received: by mail-oi1-f181.google.com with SMTP id 5614622812f47-3db130a872fso669253b6e.2; Tue, 06 Aug 2024 14:45:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1722980709; x=1723585509; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dSeuCMY2us9pa1SAbHTqv2Z4dVLFCX20r2NmRNPUfIc=; b=UYftF/MedrINrxQ2Jnko5uqzBWsxdo/IjVb7aU75NAomXq8ZbRwRbIxX8SLRCu0751 cy0O3i25nYCrmgRlY6/xISeJDVVpOVvI2RUr1XPRcdo1ZO73hpptlFp2RK/0tX9oo+vU hAIZKrzFAI88n81GyjeG9Y/e+tFM3HLbtJFKPHbD2/zmMNs3qgiwUe0C1U/1fHpBkEWz LBK/CwGwC5T1glJ/N7+PMdsHX7W/5zkiqmeFZb0xxKEj5kxdF/YHmy+CleJroo9aUbZ4 NO2O1bOmnrlldHf0H53PO/Y0wr/etVwW3D7EyUmpzyJ1d+WuqAKkp3H5Bb+1rxSRoidc DxWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722980709; x=1723585509; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dSeuCMY2us9pa1SAbHTqv2Z4dVLFCX20r2NmRNPUfIc=; b=Mvo0E3PmJ/jr2wCocuT+asXTkAnCj0Jf1Pik7qX07nycHki7iUbeWOUBLTSv6Y/VHm 5lbRKeVkuwCZ/Y3PLOyuyWD1o0AsrpbLC4yIT9Ehs/gFQvQO4gXMAVJnGzkDGZqR5chZ 5O9r1c+wPj3vvuTA2eDEdunCP1S2/91ms8ErHGQsn37zSlhbOLfmNnx+6HoCmorDoD4l kjPho0rgIgWqLCHY6oUrawKA1M1MpEQVF37Gt40jgUMzz/D20hCAzr4gFOLKS5LvqRy8 yKZDagh2wv4t1pEkEZFRq4InYkwZ+EfUqnpks14IH5gbGwnGfy1lz8Rwys6SPGC4cWcH Z9+g== X-Forwarded-Encrypted: i=1; AJvYcCXB0SLdbJCWx9l/4/rR9ydzo/PelVjIa85OIMrwfeCobKbTsz5u4aFdpQkXw5QHquWAElePE6F3CEoqLDNlSwCKSYz2pdmT3FQlluKB4TLrt+G1m+Ifs9HUbakK8/ZDCaoWsOHxCdsLQ157Lkd73mZv X-Gm-Message-State: AOJu0YxDuZtxpOdrPN6vR6gMzkzY/IH15kHVjrcht72YlHOyslsE8XGy DzKg5j4lWbY8ozLTx6Q6J1KwnKK8CEBQseWIHBPpt937lGcW1551 X-Google-Smtp-Source: AGHT+IHjmCaxtnKid4AHurYbomguGMwczge8XJ8F8ZPGP2TI5AE9qlYWnjEI/J8rCOpJ0CJ3kgo+sA== X-Received: by 2002:a05:6808:199e:b0:3db:50dc:de89 with SMTP id 5614622812f47-3db5580f0dfmr20519797b6e.24.1722980708993; Tue, 06 Aug 2024 14:45:08 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4518a7572c3sm41048301cf.60.2024.08.06.14.45.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Aug 2024 14:45:08 -0700 (PDT) From: Richard Acayan To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Richard Acayan Subject: [PATCH v2 3/4] arm64: dts: qcom: sdm670: add gpu Date: Tue, 6 Aug 2024 17:44:57 -0400 Message-ID: <20240806214452.16406-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240806214452.16406-7-mailingradian@gmail.com> References: <20240806214452.16406-7-mailingradian@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Snapdragon 670 has the Adreno A615 GPU. Add it along with its device tree dependencies. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 180 +++++++++++++++++++++++++++ 1 file changed, 180 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 187c6698835d..5c274a378848 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -617,6 +618,11 @@ qfprom: qfprom@784000 { #address-cells = <1>; #size-cells = <1>; + gpu_speed_bin: gpu_speed_bin@1a2 { + reg = <0x1a2 0x2>; + bits = <5 8>; + }; + qusb2_hstx_trim: hstx-trim@1eb { reg = <0x1eb 0x1>; bits = <1 4>; @@ -1299,6 +1305,180 @@ rclk-pins { }; }; + gpu: gpu@5000000 { + compatible = "qcom,adreno-615.0", "qcom,adreno"; + + reg = <0 0x05000000 0 0x40000>, <0 0x0509e000 0 0x10>; + reg-names = "kgsl_3d0_reg_memory", "cx_mem"; + + /* + * Look ma, no clocks! The GPU clocks and power are + * controlled entirely by the GMU + */ + + interrupts = ; + + iommus = <&adreno_smmu 0>; + + operating-points-v2 = <&gpu_opp_table>; + + qcom,gmu = <&gmu>; + + interconnects = <&mem_noc MASTER_GRAPHICS_3D 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "gfx-mem"; + + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + + status = "disabled"; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-780000000 { + opp-hz = /bits/ 64 <780000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0x8>; + }; + + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0x8>; + }; + + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0x4>; + }; + + opp-650000000 { + opp-hz = /bits/ 64 <650000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0xc>; + }; + + opp-565000000 { + opp-hz = /bits/ 64 <565000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0xc>; + }; + + opp-504000000 { + opp-hz = /bits/ 64 <504000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0x2>; + }; + + opp-430000000 { + opp-hz = /bits/ 64 <430000000>; + opp-level = ; + opp-peak-kBps = <7216000>; + opp-supported-hw = <0xf>; + }; + + opp-355000000 { + opp-hz = /bits/ 64 <355000000>; + opp-level = ; + opp-peak-kBps = <6220000>; + opp-supported-hw = <0xf>; + }; + + opp-267000000 { + opp-hz = /bits/ 64 <267000000>; + opp-level = ; + opp-peak-kBps = <4068000>; + opp-supported-hw = <0xf>; + }; + + opp-180000000 { + opp-hz = /bits/ 64 <180000000>; + opp-level = ; + opp-peak-kBps = <1804000>; + opp-supported-hw = <0xf>; + }; + }; + }; + + adreno_smmu: iommu@5040000 { + compatible = "qcom,sdm670-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; + reg = <0 0x05040000 0 0x10000>; + #iommu-cells = <1>; + #global-interrupts = <2>; + interrupts = , + , + , + , + , + , + , + , + , + ; + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_CFG_AHB_CLK>; + clock-names = "bus", "iface"; + + power-domains = <&gpucc GPU_CX_GDSC>; + }; + + gmu: gmu@506a000 { + compatible = "qcom,adreno-gmu-615.0", "qcom,adreno-gmu"; + + reg = <0 0x0506a000 0 0x30000>, + <0 0x0b280000 0 0x10000>, + <0 0x0b480000 0 0x10000>; + reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; + + interrupts = , + ; + interrupt-names = "hfi", "gmu"; + + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>; + clock-names = "gmu", "cxo", "axi", "memnoc"; + + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + + iommus = <&adreno_smmu 5>; + + operating-points-v2 = <&gmu_opp_table>; + + gmu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-level = ; + }; + }; + }; + + gpucc: clock-controller@5090000 { + compatible = "qcom,sdm845-gpucc"; + reg = <0 0x05090000 0 0x9000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + clock-names = "bi_tcxo", + "gcc_gpu_gpll0_clk_src", + "gcc_gpu_gpll0_div_clk_src"; + }; + usb_1_hsphy: phy@88e2000 { compatible = "qcom,sdm670-qusb2-phy", "qcom,qusb2-v2-phy"; reg = <0 0x088e2000 0 0x400>;