From patchwork Sat Aug 17 21:00:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 13767231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E7DEC5320E for ; Sat, 17 Aug 2024 21:01:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8211410E0F1; Sat, 17 Aug 2024 21:01:19 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TxE+ztWY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15E5910E0F5; Sat, 17 Aug 2024 21:01:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723928478; x=1755464478; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ly9Fdr/iERN3yio0j4/aEZELJnKRa+GMJXVmIwYHrC4=; b=TxE+ztWYGZAdioXCiLMXf+T6oiYvmZaZRDIvSY87QrCX5XhThtGLExMF IEjPeekRm9ECnqzm1TpQdzNVoh7ni8xveycCE6DhTABOp3XB31HxOopxJ amC+hEK5IDfd+U5kr2PVV8gp43DYM8+le4zTDMruIfNVBxDeQOdMJqj7M zAdxvIEzMFuTZZtZIpgCjQ4daG9/OCO+JFaSy5fc/loafE3wOudINdIee +sYdltPFlv4GL40ketfM6jU1g7NK/zTJ+Kt7UsVo/5BBhR/lmH0MdlEX/ TmSofyTnquThWy+TckOZ0KsEGmOfOvsSKvfkhvcdDlGOn0Ti/hH1fHJou g==; X-CSE-ConnectionGUID: 6YThCiScQUWK3s/kMmTC9Q== X-CSE-MsgGUID: 2j0B5gbsQD69MyEOlgWLow== X-IronPort-AV: E=McAfee;i="6700,10204,11167"; a="44725435" X-IronPort-AV: E=Sophos;i="6.10,155,1719903600"; d="scan'208";a="44725435" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2024 14:01:18 -0700 X-CSE-ConnectionGUID: aJsGh4/oQ1mGBUFCjOmF6Q== X-CSE-MsgGUID: eloRSpWoTdKyVysXsidmVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,155,1719903600"; d="scan'208";a="59636027" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO intel.com) ([10.245.246.11]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2024 14:01:15 -0700 From: Andi Shyti To: intel-gfx , dri-devel Cc: Chris Wilson , Andi Shyti Subject: [RFC PATCH v2 05/11] drm/i915/gt: Remove cslices mask value from the CCS structure Date: Sat, 17 Aug 2024 23:00:20 +0200 Message-ID: <20240817210026.310645-6-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240817210026.310645-1-andi.shyti@linux.intel.com> References: <20240817210026.310645-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Following the decision to manage CCS engine creation within UABI engines, the "cslices" variable in the "ccs" structure in the "gt" is no longer needed. Remove it is now redundant. Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 ----- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c index 6afd44ffc358..2b6d4ee7445d 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c @@ -9,7 +9,7 @@ void intel_gt_apply_ccs_mode(struct intel_gt *gt, u32 mode) { - unsigned long cslices_mask = gt->ccs.cslices; + unsigned long cslices_mask = CCS_MASK(gt); u32 mode_val = 0; u32 m = mode; int ccs_id; diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index 8df8fac066c0..a833b395237b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -218,11 +218,6 @@ struct intel_gt { * i.e. how the CCS streams are distributed amongs the slices. */ struct { - /* - * Mask of the non fused CCS slices - * to be used for the load balancing - */ - intel_engine_mask_t cslices; struct mutex mutex; u32 mode_reg_val; } ccs;