diff mbox series

[-next,v2,RESEND] drm/amd/display: Remove unused dcn35_fpga_funcs

Message ID 20240822015819.3356282-1-ruanjinjie@huawei.com (mailing list archive)
State New, archived
Headers show
Series [-next,v2,RESEND] drm/amd/display: Remove unused dcn35_fpga_funcs | expand

Commit Message

Jinjie Ruan Aug. 22, 2024, 1:58 a.m. UTC 
dcn35_fpga_funcs is not used anywhere, remove it.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
v2:
- Remove it instead of making it static.
---
 .../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c   | 7 -------
 1 file changed, 7 deletions(-)

Comments

Alex Deucher Aug. 22, 2024, 6:01 p.m. UTC | #1 
On Thu, Aug 22, 2024 at 5:20 AM Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>
> dcn35_fpga_funcs is not used anywhere, remove it.

This will lead to warnings about unused functions.  The fpga specific
functions should be removed as well.  I'd suggest compile testing your
changes first to catch these types of warnings.

Alex


>
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> ---
> v2:
> - Remove it instead of making it static.
> ---
>  .../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c   | 7 -------
>  1 file changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
> index e2d906327e2e..15977c2d256d 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
> @@ -1068,13 +1068,6 @@ static struct clk_mgr_funcs dcn35_funcs = {
>         .is_ips_supported = dcn35_is_ips_supported,
>  };
>
> -struct clk_mgr_funcs dcn35_fpga_funcs = {
> -       .get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
> -       .update_clocks = dcn35_update_clocks_fpga,
> -       .init_clocks = dcn35_init_clocks_fpga,
> -       .get_dtb_ref_clk_frequency = dcn31_get_dtb_ref_freq_khz,
> -};
> -
>  void dcn35_clk_mgr_construct(
>                 struct dc_context *ctx,
>                 struct clk_mgr_dcn35 *clk_mgr,
> --
> 2.34.1
>
Jinjie Ruan Aug. 23, 2024, 1:18 a.m. UTC | #2 
On 2024/8/23 2:01, Alex Deucher wrote:
> On Thu, Aug 22, 2024 at 5:20 AM Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>>
>> dcn35_fpga_funcs is not used anywhere, remove it.
> 
> This will lead to warnings about unused functions.  The fpga specific
> functions should be removed as well.  I'd suggest compile testing your
> changes first to catch these types of warnings.

Thank you!, I noticed these warnings later and it is too late, I'll send
out a new version today.

> 
> Alex
> 
> 
>>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>> ---
>> v2:
>> - Remove it instead of making it static.
>> ---
>>  .../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c   | 7 -------
>>  1 file changed, 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
>> index e2d906327e2e..15977c2d256d 100644
>> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
>> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
>> @@ -1068,13 +1068,6 @@ static struct clk_mgr_funcs dcn35_funcs = {
>>         .is_ips_supported = dcn35_is_ips_supported,
>>  };
>>
>> -struct clk_mgr_funcs dcn35_fpga_funcs = {
>> -       .get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
>> -       .update_clocks = dcn35_update_clocks_fpga,
>> -       .init_clocks = dcn35_init_clocks_fpga,
>> -       .get_dtb_ref_clk_frequency = dcn31_get_dtb_ref_freq_khz,
>> -};
>> -
>>  void dcn35_clk_mgr_construct(
>>                 struct dc_context *ctx,
>>                 struct clk_mgr_dcn35 *clk_mgr,
>> --
>> 2.34.1
>>
kernel test robot Aug. 23, 2024, 3:23 a.m. UTC | #3 
Hi Jinjie,

kernel test robot noticed the following build warnings:

[auto build test WARNING on next-20240821]

url:    https://github.com/intel-lab-lkp/linux/commits/Jinjie-Ruan/drm-amd-display-Remove-unused-dcn35_fpga_funcs/20240822-095139
base:   next-20240821
patch link:    https://lore.kernel.org/r/20240822015819.3356282-1-ruanjinjie%40huawei.com
patch subject: [PATCH -next v2 RESEND] drm/amd/display: Remove unused dcn35_fpga_funcs
config: x86_64-buildonly-randconfig-005-20240823 (https://download.01.org/0day-ci/archive/20240823/202408231105.BpoYpNK6-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240823/202408231105.BpoYpNK6-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408231105.BpoYpNK6-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c:989:13: warning: 'dcn35_update_clocks_fpga' defined but not used [-Wunused-function]
     989 | static void dcn35_update_clocks_fpga(struct clk_mgr *clk_mgr,
         |             ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c:982:13: warning: 'dcn35_init_clocks_fpga' defined but not used [-Wunused-function]
     982 | static void dcn35_init_clocks_fpga(struct clk_mgr *clk_mgr)
         |             ^~~~~~~~~~~~~~~~~~~~~~


vim +/dcn35_update_clocks_fpga +989 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

93a66cef607cfe Sung Joon Kim 2023-08-18   981  
8774029f76b980 Qingqing Zhuo 2023-08-02  @982  static void dcn35_init_clocks_fpga(struct clk_mgr *clk_mgr)
8774029f76b980 Qingqing Zhuo 2023-08-02   983  {
f2a905b01c6dcc Eric Yang     2024-01-16   984  	init_clk_states(clk_mgr);
8774029f76b980 Qingqing Zhuo 2023-08-02   985  
8774029f76b980 Qingqing Zhuo 2023-08-02   986  /* TODO: Implement the functions and remove the ifndef guard */
8774029f76b980 Qingqing Zhuo 2023-08-02   987  }
8774029f76b980 Qingqing Zhuo 2023-08-02   988  
8774029f76b980 Qingqing Zhuo 2023-08-02  @989  static void dcn35_update_clocks_fpga(struct clk_mgr *clk_mgr,
8774029f76b980 Qingqing Zhuo 2023-08-02   990  		struct dc_state *context,
8774029f76b980 Qingqing Zhuo 2023-08-02   991  		bool safe_to_lower)
8774029f76b980 Qingqing Zhuo 2023-08-02   992  {
8774029f76b980 Qingqing Zhuo 2023-08-02   993  	struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr);
8774029f76b980 Qingqing Zhuo 2023-08-02   994  	struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
8774029f76b980 Qingqing Zhuo 2023-08-02   995  	int fclk_adj = new_clocks->fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02   996  
8774029f76b980 Qingqing Zhuo 2023-08-02   997  	/* TODO: remove this after correctly set by DML */
8774029f76b980 Qingqing Zhuo 2023-08-02   998  	new_clocks->dcfclk_khz = 400000;
8774029f76b980 Qingqing Zhuo 2023-08-02   999  	new_clocks->socclk_khz = 400000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1000  
8774029f76b980 Qingqing Zhuo 2023-08-02  1001  	/* Min fclk = 1.2GHz since all the extra scemi logic seems to run off of it */
8774029f76b980 Qingqing Zhuo 2023-08-02  1002  	//int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1003  	new_clocks->fclk_khz = 4320000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1004  
8774029f76b980 Qingqing Zhuo 2023-08-02  1005  	if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1006  		clk_mgr->clks.phyclk_khz = new_clocks->phyclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1007  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1008  
8774029f76b980 Qingqing Zhuo 2023-08-02  1009  	if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1010  		clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1011  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1012  
8774029f76b980 Qingqing Zhuo 2023-08-02  1013  	if (should_set_clock(safe_to_lower,
8774029f76b980 Qingqing Zhuo 2023-08-02  1014  			new_clocks->dcfclk_deep_sleep_khz, clk_mgr->clks.dcfclk_deep_sleep_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1015  		clk_mgr->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1016  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1017  
8774029f76b980 Qingqing Zhuo 2023-08-02  1018  	if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr->clks.socclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1019  		clk_mgr->clks.socclk_khz = new_clocks->socclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1020  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1021  
8774029f76b980 Qingqing Zhuo 2023-08-02  1022  	if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1023  		clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1024  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1025  
8774029f76b980 Qingqing Zhuo 2023-08-02  1026  	if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1027  		clk_mgr->clks.dppclk_khz = new_clocks->dppclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1028  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1029  
8774029f76b980 Qingqing Zhuo 2023-08-02  1030  	if (should_set_clock(safe_to_lower, fclk_adj, clk_mgr->clks.fclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1031  		clk_mgr->clks.fclk_khz = fclk_adj;
8774029f76b980 Qingqing Zhuo 2023-08-02  1032  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1033  
8774029f76b980 Qingqing Zhuo 2023-08-02  1034  	if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr->clks.dispclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1035  		clk_mgr->clks.dispclk_khz = new_clocks->dispclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1036  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1037  
8774029f76b980 Qingqing Zhuo 2023-08-02  1038  	/* Both fclk and ref_dppclk run on the same scemi clock.
8774029f76b980 Qingqing Zhuo 2023-08-02  1039  	 * So take the higher value since the DPP DTO is typically programmed
8774029f76b980 Qingqing Zhuo 2023-08-02  1040  	 * such that max dppclk is 1:1 with ref_dppclk.
8774029f76b980 Qingqing Zhuo 2023-08-02  1041  	 */
8774029f76b980 Qingqing Zhuo 2023-08-02  1042  	if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz)
8774029f76b980 Qingqing Zhuo 2023-08-02  1043  		clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1044  	if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz)
8774029f76b980 Qingqing Zhuo 2023-08-02  1045  		clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1046  
8774029f76b980 Qingqing Zhuo 2023-08-02  1047  	// Both fclk and ref_dppclk run on the same scemi clock.
8774029f76b980 Qingqing Zhuo 2023-08-02  1048  	clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1049  
8774029f76b980 Qingqing Zhuo 2023-08-02  1050  	/* TODO: set dtbclk in correct place */
8774029f76b980 Qingqing Zhuo 2023-08-02  1051  	clk_mgr->clks.dtbclk_en = true;
8774029f76b980 Qingqing Zhuo 2023-08-02  1052  	dm_set_dcn_clocks(clk_mgr->ctx, &clk_mgr->clks);
8774029f76b980 Qingqing Zhuo 2023-08-02  1053  	dcn35_update_clocks_update_dpp_dto(clk_mgr_int, context, safe_to_lower);
8774029f76b980 Qingqing Zhuo 2023-08-02  1054  
8774029f76b980 Qingqing Zhuo 2023-08-02  1055  	dcn35_update_clocks_update_dtb_dto(clk_mgr_int, context, clk_mgr->clks.ref_dtbclk_khz);
8774029f76b980 Qingqing Zhuo 2023-08-02  1056  }
8774029f76b980 Qingqing Zhuo 2023-08-02  1057
kernel test robot Aug. 23, 2024, 6:08 a.m. UTC | #4 
Hi Jinjie,

kernel test robot noticed the following build errors:

[auto build test ERROR on next-20240821]

url:    https://github.com/intel-lab-lkp/linux/commits/Jinjie-Ruan/drm-amd-display-Remove-unused-dcn35_fpga_funcs/20240822-095139
base:   next-20240821
patch link:    https://lore.kernel.org/r/20240822015819.3356282-1-ruanjinjie%40huawei.com
patch subject: [PATCH -next v2 RESEND] drm/amd/display: Remove unused dcn35_fpga_funcs
config: i386-randconfig-006-20240823 (https://download.01.org/0day-ci/archive/20240823/202408231338.Egp42Fkn-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240823/202408231338.Egp42Fkn-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408231338.Egp42Fkn-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c:989:13: error: 'dcn35_update_clocks_fpga' defined but not used [-Werror=unused-function]
     989 | static void dcn35_update_clocks_fpga(struct clk_mgr *clk_mgr,
         |             ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c:982:13: error: 'dcn35_init_clocks_fpga' defined but not used [-Werror=unused-function]
     982 | static void dcn35_init_clocks_fpga(struct clk_mgr *clk_mgr)
         |             ^~~~~~~~~~~~~~~~~~~~~~
   cc1: all warnings being treated as errors


vim +/dcn35_update_clocks_fpga +989 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

93a66cef607cfe Sung Joon Kim 2023-08-18   981  
8774029f76b980 Qingqing Zhuo 2023-08-02  @982  static void dcn35_init_clocks_fpga(struct clk_mgr *clk_mgr)
8774029f76b980 Qingqing Zhuo 2023-08-02   983  {
f2a905b01c6dcc Eric Yang     2024-01-16   984  	init_clk_states(clk_mgr);
8774029f76b980 Qingqing Zhuo 2023-08-02   985  
8774029f76b980 Qingqing Zhuo 2023-08-02   986  /* TODO: Implement the functions and remove the ifndef guard */
8774029f76b980 Qingqing Zhuo 2023-08-02   987  }
8774029f76b980 Qingqing Zhuo 2023-08-02   988  
8774029f76b980 Qingqing Zhuo 2023-08-02  @989  static void dcn35_update_clocks_fpga(struct clk_mgr *clk_mgr,
8774029f76b980 Qingqing Zhuo 2023-08-02   990  		struct dc_state *context,
8774029f76b980 Qingqing Zhuo 2023-08-02   991  		bool safe_to_lower)
8774029f76b980 Qingqing Zhuo 2023-08-02   992  {
8774029f76b980 Qingqing Zhuo 2023-08-02   993  	struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr);
8774029f76b980 Qingqing Zhuo 2023-08-02   994  	struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
8774029f76b980 Qingqing Zhuo 2023-08-02   995  	int fclk_adj = new_clocks->fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02   996  
8774029f76b980 Qingqing Zhuo 2023-08-02   997  	/* TODO: remove this after correctly set by DML */
8774029f76b980 Qingqing Zhuo 2023-08-02   998  	new_clocks->dcfclk_khz = 400000;
8774029f76b980 Qingqing Zhuo 2023-08-02   999  	new_clocks->socclk_khz = 400000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1000  
8774029f76b980 Qingqing Zhuo 2023-08-02  1001  	/* Min fclk = 1.2GHz since all the extra scemi logic seems to run off of it */
8774029f76b980 Qingqing Zhuo 2023-08-02  1002  	//int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1003  	new_clocks->fclk_khz = 4320000;
8774029f76b980 Qingqing Zhuo 2023-08-02  1004  
8774029f76b980 Qingqing Zhuo 2023-08-02  1005  	if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1006  		clk_mgr->clks.phyclk_khz = new_clocks->phyclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1007  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1008  
8774029f76b980 Qingqing Zhuo 2023-08-02  1009  	if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1010  		clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1011  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1012  
8774029f76b980 Qingqing Zhuo 2023-08-02  1013  	if (should_set_clock(safe_to_lower,
8774029f76b980 Qingqing Zhuo 2023-08-02  1014  			new_clocks->dcfclk_deep_sleep_khz, clk_mgr->clks.dcfclk_deep_sleep_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1015  		clk_mgr->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1016  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1017  
8774029f76b980 Qingqing Zhuo 2023-08-02  1018  	if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr->clks.socclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1019  		clk_mgr->clks.socclk_khz = new_clocks->socclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1020  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1021  
8774029f76b980 Qingqing Zhuo 2023-08-02  1022  	if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1023  		clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1024  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1025  
8774029f76b980 Qingqing Zhuo 2023-08-02  1026  	if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1027  		clk_mgr->clks.dppclk_khz = new_clocks->dppclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1028  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1029  
8774029f76b980 Qingqing Zhuo 2023-08-02  1030  	if (should_set_clock(safe_to_lower, fclk_adj, clk_mgr->clks.fclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1031  		clk_mgr->clks.fclk_khz = fclk_adj;
8774029f76b980 Qingqing Zhuo 2023-08-02  1032  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1033  
8774029f76b980 Qingqing Zhuo 2023-08-02  1034  	if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr->clks.dispclk_khz)) {
8774029f76b980 Qingqing Zhuo 2023-08-02  1035  		clk_mgr->clks.dispclk_khz = new_clocks->dispclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1036  	}
8774029f76b980 Qingqing Zhuo 2023-08-02  1037  
8774029f76b980 Qingqing Zhuo 2023-08-02  1038  	/* Both fclk and ref_dppclk run on the same scemi clock.
8774029f76b980 Qingqing Zhuo 2023-08-02  1039  	 * So take the higher value since the DPP DTO is typically programmed
8774029f76b980 Qingqing Zhuo 2023-08-02  1040  	 * such that max dppclk is 1:1 with ref_dppclk.
8774029f76b980 Qingqing Zhuo 2023-08-02  1041  	 */
8774029f76b980 Qingqing Zhuo 2023-08-02  1042  	if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz)
8774029f76b980 Qingqing Zhuo 2023-08-02  1043  		clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1044  	if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz)
8774029f76b980 Qingqing Zhuo 2023-08-02  1045  		clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1046  
8774029f76b980 Qingqing Zhuo 2023-08-02  1047  	// Both fclk and ref_dppclk run on the same scemi clock.
8774029f76b980 Qingqing Zhuo 2023-08-02  1048  	clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz;
8774029f76b980 Qingqing Zhuo 2023-08-02  1049  
8774029f76b980 Qingqing Zhuo 2023-08-02  1050  	/* TODO: set dtbclk in correct place */
8774029f76b980 Qingqing Zhuo 2023-08-02  1051  	clk_mgr->clks.dtbclk_en = true;
8774029f76b980 Qingqing Zhuo 2023-08-02  1052  	dm_set_dcn_clocks(clk_mgr->ctx, &clk_mgr->clks);
8774029f76b980 Qingqing Zhuo 2023-08-02  1053  	dcn35_update_clocks_update_dpp_dto(clk_mgr_int, context, safe_to_lower);
8774029f76b980 Qingqing Zhuo 2023-08-02  1054  
8774029f76b980 Qingqing Zhuo 2023-08-02  1055  	dcn35_update_clocks_update_dtb_dto(clk_mgr_int, context, clk_mgr->clks.ref_dtbclk_khz);
8774029f76b980 Qingqing Zhuo 2023-08-02  1056  }
8774029f76b980 Qingqing Zhuo 2023-08-02  1057
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index e2d906327e2e..15977c2d256d 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -1068,13 +1068,6 @@  static struct clk_mgr_funcs dcn35_funcs = {
 	.is_ips_supported = dcn35_is_ips_supported,
 };
 
-struct clk_mgr_funcs dcn35_fpga_funcs = {
-	.get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
-	.update_clocks = dcn35_update_clocks_fpga,
-	.init_clocks = dcn35_init_clocks_fpga,
-	.get_dtb_ref_clk_frequency = dcn31_get_dtb_ref_freq_khz,
-};
-
 void dcn35_clk_mgr_construct(
 		struct dc_context *ctx,
 		struct clk_mgr_dcn35 *clk_mgr,