diff mbox series

[v1] drivers:smumgr:Variable names should be consistent with other modules

Message ID 20240822071056.1342551-1-11162571@vivo.com (mailing list archive)
State New, archived
Headers show
Series [v1] drivers:smumgr:Variable names should be consistent with other modules | expand

Commit Message

Yang Ruibin Aug. 22, 2024, 7:10 a.m. UTC
The variable highest_pcie_level_enabled is named 
hightest_pcie_level_enabled in other modules. 
Please ensure the consistency of variable naming
and use min macros instead of the triadic operator.

Signed-off-by: Yang Ruibin <11162571@vivo.com>
---
 .../amd/pm/powerplay/smumgr/iceland_smumgr.c    | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

Comments

Geert Uytterhoeven Aug. 30, 2024, 8:59 a.m. UTC | #1
Hi Yang,

Thanks for your patch!

On Thu, Aug 22, 2024 at 9:11 AM Yang Ruibin <11162571@vivo.com> wrote:
> The variable highest_pcie_level_enabled is named
> hightest_pcie_level_enabled in other modules.
> Please ensure the consistency of variable naming
> and use min macros instead of the triadic operator.

"hightest_pcie_level_enabled" is the wrong spelling, so the other modules
should be fixed instead:

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c
drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

> Signed-off-by: Yang Ruibin <11162571@vivo.com>

> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

> @@ -1012,19 +1012,18 @@ static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
>                 lowest_pcie_level_enabled++;
>         }
>
> -       while ((count < highest_pcie_level_enabled) &&
> +       while ((count < hightest_pcie_level_enabled) &&
>                         ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &
>                                 (1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) {
>                 count++;
>         }
>
> -       mid_pcie_level_enabled = (lowest_pcie_level_enabled+1+count) < highest_pcie_level_enabled ?
> -               (lowest_pcie_level_enabled+1+count) : highest_pcie_level_enabled;
> +       mid_pcie_level_enabled = min(lowest_pcie_level_enabled + 1 + count,
> +                                       hightest_pcie_level_enabled);

This is an unrelated change; please create a separate patch for this.

> -
> -       /* set pcieDpmLevel to highest_pcie_level_enabled*/
> +       /* set pcieDpmLevel to hightest_pcie_level_enabled*/
>         for (i = 2; i < dpm_table->sclk_table.count; i++) {
> -               smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled;
> +               smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel =
> +                                       hightest_pcie_level_enabled;
>         }
>
>         /* set pcieDpmLevel to lowest_pcie_level_enabled*/

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
index 17d2f5bff..165fbfa2e 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
@@ -970,7 +970,7 @@  static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 	SMU71_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel;
 
 	uint32_t i;
-	uint8_t highest_pcie_level_enabled = 0;
+	uint8_t hightest_pcie_level_enabled = 0;
 	uint8_t lowest_pcie_level_enabled = 0, mid_pcie_level_enabled = 0;
 	uint8_t count = 0;
 	int result = 0;
@@ -1003,8 +1003,8 @@  static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 		phm_get_dpm_level_enable_mask_value(&dpm_table->sclk_table);
 
 	while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &
-				(1 << (highest_pcie_level_enabled + 1))) != 0) {
-		highest_pcie_level_enabled++;
+				(1 << (hightest_pcie_level_enabled + 1))) != 0) {
+		hightest_pcie_level_enabled++;
 	}
 
 	while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &
@@ -1012,19 +1012,18 @@  static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 		lowest_pcie_level_enabled++;
 	}
 
-	while ((count < highest_pcie_level_enabled) &&
+	while ((count < hightest_pcie_level_enabled) &&
 			((data->dpm_level_enable_mask.pcie_dpm_enable_mask &
 				(1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) {
 		count++;
 	}
 
-	mid_pcie_level_enabled = (lowest_pcie_level_enabled+1+count) < highest_pcie_level_enabled ?
-		(lowest_pcie_level_enabled+1+count) : highest_pcie_level_enabled;
+	mid_pcie_level_enabled = min(lowest_pcie_level_enabled + 1 + count,
+					hightest_pcie_level_enabled);
 
-
-	/* set pcieDpmLevel to highest_pcie_level_enabled*/
+	/* set pcieDpmLevel to hightest_pcie_level_enabled*/
 	for (i = 2; i < dpm_table->sclk_table.count; i++) {
-		smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled;
+		smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel =
+					hightest_pcie_level_enabled;
 	}
 
 	/* set pcieDpmLevel to lowest_pcie_level_enabled*/