diff mbox series

[1/3] drm/ast: Rename register constants for TX-chip types

Message ID 20240916082920.56234-2-tzimmermann@suse.de (mailing list archive)
State New
Headers show
Series drm/ast: Clean up use of TX-chip register constants | expand

Commit Message

Thomas Zimmermann Sept. 16, 2024, 8:25 a.m. UTC
The type of the TX chip is provided in VGACRD1. Rename the constants
accordingly.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/ast/ast_main.c |  4 ++--
 drivers/gpu/drm/ast/ast_reg.h  | 26 ++++++++++++--------------
 2 files changed, 14 insertions(+), 16 deletions(-)

Comments

Jocelyn Falempe Sept. 16, 2024, 1:18 p.m. UTC | #1
On 16/09/2024 10:25, Thomas Zimmermann wrote:
> The type of the TX chip is provided in VGACRD1. Rename the constants
> accordingly.

Thanks, it looks good to me.

Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>

> 
> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
>   drivers/gpu/drm/ast/ast_main.c |  4 ++--
>   drivers/gpu/drm/ast/ast_reg.h  | 26 ++++++++++++--------------
>   2 files changed, 14 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
> index 3d92d9e5208f..d0e4f0dc9234 100644
> --- a/drivers/gpu/drm/ast/ast_main.c
> +++ b/drivers/gpu/drm/ast/ast_main.c
> @@ -120,8 +120,8 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
>   			ast->tx_chip = AST_TX_DP501;
>   		}
>   	} else if (IS_AST_GEN7(ast)) {
> -		if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xD1, TX_TYPE_MASK) ==
> -		    ASTDP_DPMCU_TX) {
> +		if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK) ==
> +		    AST_IO_VGACRD1_TX_ASTDP) {
>   			int ret = ast_dp_launch(ast);
>   
>   			if (!ret)
> diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
> index 6a1f756650ab..daa5d3a9e6a1 100644
> --- a/drivers/gpu/drm/ast/ast_reg.h
> +++ b/drivers/gpu/drm/ast/ast_reg.h
> @@ -37,7 +37,18 @@
>   #define AST_IO_VGACRCB_HWC_16BPP	BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
>   #define AST_IO_VGACRCB_HWC_ENABLED	BIT(1)
>   
> -#define AST_IO_VGACRD1_MCU_FW_EXECUTING	BIT(5)
> +#define AST_IO_VGACRD1_MCU_FW_EXECUTING		BIT(5)
> +/* Display Transmitter Type */
> +#define AST_IO_VGACRD1_TX_TYPE_MASK		GENMASK(3, 1)
> +#define AST_IO_VGACRD1_NO_TX			0x00
> +#define AST_IO_VGACRD1_TX_ITE66121_VBIOS	0x02
> +#define AST_IO_VGACRD1_TX_SIL164_VBIOS		0x04
> +#define AST_IO_VGACRD1_TX_CH7003_VBIOS		0x06
> +#define AST_IO_VGACRD1_TX_DP501_VBIOS		0x08
> +#define AST_IO_VGACRD1_TX_ANX9807_VBIOS		0x0a
> +#define AST_IO_VGACRD1_TX_FW_EMBEDDED_FW	0x0c
> +#define AST_IO_VGACRD1_TX_ASTDP			0x0e
> +
>   #define AST_IO_VGACRD7_EDID_VALID_FLAG	BIT(0)
>   #define AST_IO_VGACRDC_LINK_SUCCESS	BIT(0)
>   #define AST_IO_VGACRDF_HPD		BIT(0)
> @@ -49,19 +60,6 @@
>   #define AST_IO_VGAIR1_R			(0x5A)
>   #define AST_IO_VGAIR1_VREFRESH		BIT(3)
>   
> -/*
> - * Display Transmitter Type
> - */
> -
> -#define TX_TYPE_MASK			GENMASK(3, 1)
> -#define NO_TX				(0 << 1)
> -#define ITE66121_VBIOS_TX		(1 << 1)
> -#define SI164_VBIOS_TX			(2 << 1)
> -#define CH7003_VBIOS_TX			(3 << 1)
> -#define DP501_VBIOS_TX			(4 << 1)
> -#define ANX9807_VBIOS_TX		(5 << 1)
> -#define TX_FW_EMBEDDED_FW_TX		(6 << 1)
> -#define ASTDP_DPMCU_TX			(7 << 1)
>   
>   #define AST_VRAM_INIT_STATUS_MASK	GENMASK(7, 6)
>   //#define AST_VRAM_INIT_BY_BMC		BIT(7)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 3d92d9e5208f..d0e4f0dc9234 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -120,8 +120,8 @@  static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
 			ast->tx_chip = AST_TX_DP501;
 		}
 	} else if (IS_AST_GEN7(ast)) {
-		if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xD1, TX_TYPE_MASK) ==
-		    ASTDP_DPMCU_TX) {
+		if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK) ==
+		    AST_IO_VGACRD1_TX_ASTDP) {
 			int ret = ast_dp_launch(ast);
 
 			if (!ret)
diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
index 6a1f756650ab..daa5d3a9e6a1 100644
--- a/drivers/gpu/drm/ast/ast_reg.h
+++ b/drivers/gpu/drm/ast/ast_reg.h
@@ -37,7 +37,18 @@ 
 #define AST_IO_VGACRCB_HWC_16BPP	BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
 #define AST_IO_VGACRCB_HWC_ENABLED	BIT(1)
 
-#define AST_IO_VGACRD1_MCU_FW_EXECUTING	BIT(5)
+#define AST_IO_VGACRD1_MCU_FW_EXECUTING		BIT(5)
+/* Display Transmitter Type */
+#define AST_IO_VGACRD1_TX_TYPE_MASK		GENMASK(3, 1)
+#define AST_IO_VGACRD1_NO_TX			0x00
+#define AST_IO_VGACRD1_TX_ITE66121_VBIOS	0x02
+#define AST_IO_VGACRD1_TX_SIL164_VBIOS		0x04
+#define AST_IO_VGACRD1_TX_CH7003_VBIOS		0x06
+#define AST_IO_VGACRD1_TX_DP501_VBIOS		0x08
+#define AST_IO_VGACRD1_TX_ANX9807_VBIOS		0x0a
+#define AST_IO_VGACRD1_TX_FW_EMBEDDED_FW	0x0c
+#define AST_IO_VGACRD1_TX_ASTDP			0x0e
+
 #define AST_IO_VGACRD7_EDID_VALID_FLAG	BIT(0)
 #define AST_IO_VGACRDC_LINK_SUCCESS	BIT(0)
 #define AST_IO_VGACRDF_HPD		BIT(0)
@@ -49,19 +60,6 @@ 
 #define AST_IO_VGAIR1_R			(0x5A)
 #define AST_IO_VGAIR1_VREFRESH		BIT(3)
 
-/*
- * Display Transmitter Type
- */
-
-#define TX_TYPE_MASK			GENMASK(3, 1)
-#define NO_TX				(0 << 1)
-#define ITE66121_VBIOS_TX		(1 << 1)
-#define SI164_VBIOS_TX			(2 << 1)
-#define CH7003_VBIOS_TX			(3 << 1)
-#define DP501_VBIOS_TX			(4 << 1)
-#define ANX9807_VBIOS_TX		(5 << 1)
-#define TX_FW_EMBEDDED_FW_TX		(6 << 1)
-#define ASTDP_DPMCU_TX			(7 << 1)
 
 #define AST_VRAM_INIT_STATUS_MASK	GENMASK(7, 6)
 //#define AST_VRAM_INIT_BY_BMC		BIT(7)